[PATCH] D42574: [ARM] Lower lower saturate to 0 and lower saturate to -1 using bit-operations

[Eli Friedman via Phabricator via llvm-commits]

efriedma added inline comments.


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Comment at: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp:4421
+  if (K && isLowerSaturate(LHS, RHS, TrueVal, FalseVal, CC, *K) && *K == KTmp) {
+    SDValue ShiftV = DAG.getNode(ISD::SRA, dl, VT, V, DAG.getConstant(31, dl, VT));
+    if (isNullConstant(*K)) {
----------------
The use of the constant "31" here is a bit suspicious, given you don't check the type of "VT".


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Comment at: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp:4423
+    if (isNullConstant(*K)) {
+      SDValue NotShiftV = DAG.getNode(ISD::XOR, dl, VT, ShiftV, DAG.getConstant(-1, dl, VT));
+      return DAG.getNode(ISD::AND, dl, VT, V, NotShiftV);
----------------
getAllOnesConstant?


Repository:
  rL LLVM

https://reviews.llvm.org/D42574