[llvm] r323882 - [InstCombine] move related tests into the same file; NFC
Sanjay Patel via llvm-commits
llvm-commits at lists.llvm.org
Wed Jan 31 07:48:00 PST 2018
Author: spatel
Date: Wed Jan 31 07:47:59 2018
New Revision: 323882
URL: http://llvm.org/viewvc/llvm-project?rev=323882&view=rev
Log:
[InstCombine] move related tests into the same file; NFC
Added:
llvm/trunk/test/Transforms/InstCombine/icmp-mul-zext.ll
- copied, changed from r323881, llvm/trunk/test/Transforms/InstCombine/2017-07-07-UMul-ZExt.ll
Removed:
llvm/trunk/test/Transforms/InstCombine/2017-07-07-UMul-ZExt.ll
llvm/trunk/test/Transforms/InstCombine/pr33765.ll
Removed: llvm/trunk/test/Transforms/InstCombine/2017-07-07-UMul-ZExt.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/2017-07-07-UMul-ZExt.ll?rev=323881&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/InstCombine/2017-07-07-UMul-ZExt.ll (original)
+++ llvm/trunk/test/Transforms/InstCombine/2017-07-07-UMul-ZExt.ll (removed)
@@ -1,51 +0,0 @@
-; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt < %s -instcombine -S | FileCheck %s
-
-define i32 @sterix(i32, i8, i64) {
-; CHECK-LABEL: @sterix(
-; CHECK-NEXT: entry:
-; CHECK-NEXT: [[CONV:%.*]] = zext i32 [[TMP0:%.*]] to i64
-; CHECK-NEXT: [[CONV1:%.*]] = sext i8 [[TMP1:%.*]] to i32
-; CHECK-NEXT: [[MUL:%.*]] = mul i32 [[CONV1]], 1945964878
-; CHECK-NEXT: [[SH_PROM:%.*]] = trunc i64 [[TMP2:%.*]] to i32
-; CHECK-NEXT: [[SHR:%.*]] = lshr i32 [[MUL]], [[SH_PROM]]
-; CHECK-NEXT: [[CONV2:%.*]] = zext i32 [[SHR]] to i64
-; CHECK-NEXT: [[MUL3:%.*]] = mul nuw nsw i64 [[CONV]], [[CONV2]]
-; CHECK-NEXT: [[CONV6:%.*]] = and i64 [[MUL3]], 4294967295
-; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i64 [[CONV6]], [[MUL3]]
-; CHECK-NEXT: br i1 [[TOBOOL]], label [[LOR_RHS:%.*]], label [[LOR_END:%.*]]
-; CHECK: lor.rhs:
-; CHECK-NEXT: [[AND:%.*]] = and i64 [[MUL3]], [[TMP2]]
-; CHECK-NEXT: [[CONV4:%.*]] = trunc i64 [[AND]] to i32
-; CHECK-NEXT: [[TOBOOL7:%.*]] = icmp eq i32 [[CONV4]], 0
-; CHECK-NEXT: [[PHITMP:%.*]] = zext i1 [[TOBOOL7]] to i32
-; CHECK-NEXT: br label [[LOR_END]]
-; CHECK: lor.end:
-; CHECK-NEXT: [[TMP3:%.*]] = phi i32 [ 1, [[ENTRY:%.*]] ], [ [[PHITMP]], [[LOR_RHS]] ]
-; CHECK-NEXT: ret i32 [[TMP3]]
-;
-entry:
- %conv = zext i32 %0 to i64
- %conv1 = sext i8 %1 to i32
- %mul = mul i32 %conv1, 1945964878
- %sh_prom = trunc i64 %2 to i32
- %shr = lshr i32 %mul, %sh_prom
- %conv2 = zext i32 %shr to i64
- %mul3 = mul nuw nsw i64 %conv, %conv2
- %conv6 = and i64 %mul3, 4294967295
- %tobool = icmp ne i64 %conv6, %mul3
- br i1 %tobool, label %lor.end, label %lor.rhs
-
-lor.rhs:
- %and = and i64 %2, %mul3
- %conv4 = trunc i64 %and to i32
- %tobool7 = icmp ne i32 %conv4, 0
- %lnot = xor i1 %tobool7, true
- br label %lor.end
-
-lor.end:
- %3 = phi i1 [ true, %entry ], [ %lnot, %lor.rhs ]
- %conv8 = zext i1 %3 to i32
- ret i32 %conv8
-}
-
Copied: llvm/trunk/test/Transforms/InstCombine/icmp-mul-zext.ll (from r323881, llvm/trunk/test/Transforms/InstCombine/2017-07-07-UMul-ZExt.ll)
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/icmp-mul-zext.ll?p2=llvm/trunk/test/Transforms/InstCombine/icmp-mul-zext.ll&p1=llvm/trunk/test/Transforms/InstCombine/2017-07-07-UMul-ZExt.ll&r1=323881&r2=323882&rev=323882&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/InstCombine/2017-07-07-UMul-ZExt.ll (original)
+++ llvm/trunk/test/Transforms/InstCombine/icmp-mul-zext.ll Wed Jan 31 07:47:59 2018
@@ -49,3 +49,34 @@ lor.end:
ret i32 %conv8
}
+; https://bugs.llvm.org/show_bug.cgi?id=33765
+
+ at glob = external global i16
+
+define void @PR33765(i8 %beth) {
+; CHECK-LABEL: @PR33765(
+; CHECK-NEXT: [[CONV:%.*]] = zext i8 [[BETH:%.*]] to i32
+; CHECK-NEXT: br i1 false, label [[IF_THEN9:%.*]], label [[IF_THEN9]]
+; CHECK: if.then9:
+; CHECK-NEXT: [[MUL:%.*]] = mul nuw nsw i32 [[CONV]], [[CONV]]
+; CHECK-NEXT: [[TINKY:%.*]] = load i16, i16* @glob, align 2
+; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 [[MUL]] to i16
+; CHECK-NEXT: [[CONV14:%.*]] = and i16 [[TINKY]], [[TMP1]]
+; CHECK-NEXT: store i16 [[CONV14]], i16* @glob, align 2
+; CHECK-NEXT: ret void
+;
+ %conv = zext i8 %beth to i32
+ %mul = mul nuw nsw i32 %conv, %conv
+ %conv3 = and i32 %mul, 255
+ %tobool8 = icmp ne i32 %mul, %conv3
+ br i1 %tobool8, label %if.then9, label %if.then9
+
+if.then9:
+ %tinky = load i16, i16* @glob
+ %conv13 = sext i16 %tinky to i32
+ %and = and i32 %mul, %conv13
+ %conv14 = trunc i32 %and to i16
+ store i16 %conv14, i16* @glob
+ ret void
+}
+
Removed: llvm/trunk/test/Transforms/InstCombine/pr33765.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/pr33765.ll?rev=323881&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/InstCombine/pr33765.ll (original)
+++ llvm/trunk/test/Transforms/InstCombine/pr33765.ll (removed)
@@ -1,31 +0,0 @@
-; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt -S %s -instcombine | FileCheck %s
-
- at glob = external global i16
-
-define void @patatino(i8 %beth) {
-; CHECK-LABEL: @patatino(
-; CHECK-NEXT: [[CONV:%.*]] = zext i8 [[BETH:%.*]] to i32
-; CHECK-NEXT: br i1 false, label [[IF_THEN9:%.*]], label [[IF_THEN9]]
-; CHECK: if.then9:
-; CHECK-NEXT: [[MUL:%.*]] = mul nuw nsw i32 [[CONV]], [[CONV]]
-; CHECK-NEXT: [[TINKY:%.*]] = load i16, i16* @glob, align 2
-; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 [[MUL]] to i16
-; CHECK-NEXT: [[CONV14:%.*]] = and i16 [[TINKY]], [[TMP1]]
-; CHECK-NEXT: store i16 [[CONV14]], i16* @glob, align 2
-; CHECK-NEXT: ret void
-;
- %conv = zext i8 %beth to i32
- %mul = mul nuw nsw i32 %conv, %conv
- %conv3 = and i32 %mul, 255
- %tobool8 = icmp ne i32 %mul, %conv3
- br i1 %tobool8, label %if.then9, label %if.then9
-
-if.then9:
- %tinky = load i16, i16* @glob
- %conv13 = sext i16 %tinky to i32
- %and = and i32 %mul, %conv13
- %conv14 = trunc i32 %and to i16
- store i16 %conv14, i16* @glob
- ret void
-}
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