[PATCH] D35561: Provide adequate register class for RegisterSDNode

[Simon Dardis via Phabricator via llvm-commits]

sdardis added a comment.

Please update the title with [SelectionDAG] tag and description to reflect that this is now a selection dag patch. Also, can you restore the code to where it previously was, I was incorrect about that, as it'd just make the code harder to follow in terms of handling virtual and physical registers in the same function.



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Comment at: lib/CodeGen/SelectionDAG/InstrEmitter.cpp:319-321
+    // Turn additional physreg operands into implicit uses on non-variadic
+    // instructions. This is used by call and return instructions passing
+    // arguments in registers.
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This comment should go above:

   bool Imp = II && (IIOpNum >= II->getNumOperands() && !II->isVariadic());




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Comment at: lib/CodeGen/SelectionDAG/InstrEmitter.cpp:330
+
+    if(OpRC && IIRC && OpRC != IIRC &&
+       TargetRegisterInfo::isVirtualRegister(VReg)) {
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Formatting, space after the if.


https://reviews.llvm.org/D35561