[PATCH] D42634: [ARM] FP16Pat and FullFP16Pat patterns. NFC.

[Sjoerd Meijer via Phabricator via llvm-commits]

SjoerdMeijer created this revision.
SjoerdMeijer added reviewers: samparker, olista01, t.p.northover, rengolin.
Herald added subscribers: kristof.beyls, javed.absar, aemerson.

Create and use FP16Pat FullFP16Pat helper patterns to make the difference explicit.


https://reviews.llvm.org/D42634

Files:
  lib/Target/ARM/ARMInstrFormats.td
  lib/Target/ARM/ARMInstrVFP.td


Index: lib/Target/ARM/ARMInstrVFP.td
===================================================================
--- lib/Target/ARM/ARMInstrVFP.td
+++ lib/Target/ARM/ARMInstrVFP.td
@@ -674,8 +674,8 @@
                  Requires<[HasFP16]>,
              Sched<[WriteFPCVT]>;
 
-def : Pat<(f32 (fpextend HPR:$Sm)),
-          (VCVTBHS (COPY_TO_REGCLASS HPR:$Sm, SPR))>;
+def : FullFP16Pat<(f32 (fpextend HPR:$Sm)),
+                  (VCVTBHS (COPY_TO_REGCLASS HPR:$Sm, SPR))>;
 
 def VCVTBSH: ASuI<0b11101, 0b11, 0b0011, 0b01, 0, (outs SPR:$Sd), (ins SPR:$Sm),
                  /* FIXME */ IIC_fpCVTHS, "vcvtb", ".f16.f32\t$Sd, $Sm",
@@ -750,24 +750,23 @@
   let Inst{5}     = Dm{4};
 }
 
-let Predicates = [HasFullFP16] in {
-  def : Pat<(f16_to_fp GPR:$a),
-            (f32 (COPY_TO_REGCLASS GPR:$a, HPR))>;
-  def : Pat<(fp_to_f16 HPR:$a),
-            (i32 (COPY_TO_REGCLASS HPR:$a, GPR))>;
-}
+def : FullFP16Pat<(f16_to_fp GPR:$a),
+                  (f32 (COPY_TO_REGCLASS GPR:$a, HPR))>;
+
+def : FullFP16Pat<(fp_to_f16 HPR:$a),
+                  (i32 (COPY_TO_REGCLASS HPR:$a, GPR))>;
 
-def : Pat<(fp_to_f16 SPR:$a),
-          (i32 (COPY_TO_REGCLASS (VCVTBSH SPR:$a), GPR))>;
+def : FP16Pat<(fp_to_f16 SPR:$a),
+              (i32 (COPY_TO_REGCLASS (VCVTBSH SPR:$a), GPR))>;
 
-def : Pat<(fp_to_f16 (f64 DPR:$a)),
-          (i32 (COPY_TO_REGCLASS (VCVTBDH DPR:$a), GPR))>;
+def : FP16Pat<(fp_to_f16 (f64 DPR:$a)),
+              (i32 (COPY_TO_REGCLASS (VCVTBDH DPR:$a), GPR))>;
 
-def : Pat<(f16_to_fp GPR:$a),
-          (VCVTBHS (COPY_TO_REGCLASS GPR:$a, SPR))>;
+def : FP16Pat<(f16_to_fp GPR:$a),
+              (VCVTBHS (COPY_TO_REGCLASS GPR:$a, SPR))>;
 
-def : Pat<(f64 (f16_to_fp GPR:$a)),
-          (VCVTBHD (COPY_TO_REGCLASS GPR:$a, SPR))>;
+def : FP16Pat<(f64 (f16_to_fp GPR:$a)),
+              (VCVTBHD (COPY_TO_REGCLASS GPR:$a, SPR))>;
 
 multiclass vcvt_inst<string opc, bits<2> rm,
                      SDPatternOperator node = null_frag> {
Index: lib/Target/ARM/ARMInstrFormats.td
===================================================================
--- lib/Target/ARM/ARMInstrFormats.td
+++ lib/Target/ARM/ARMInstrFormats.td
@@ -1024,6 +1024,12 @@
 class Thumb2DSPMulPat<dag pattern, dag result> : Pat<pattern, result> {
   list<Predicate> Predicates = [IsThumb2, UseMulOps, HasDSP];
 }
+class FP16Pat<dag pattern, dag result> : Pat<pattern, result> {
+  list<Predicate> Predicates = [HasFP16];
+}
+class FullFP16Pat<dag pattern, dag result> : Pat<pattern, result> {
+  list<Predicate> Predicates = [HasFullFP16];
+}
 //===----------------------------------------------------------------------===//
 // Thumb Instruction Format Definitions.
 //


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