[PATCH] D42574: [ARM] Lower lower saturate to 0 and lower saturate to -1 using bit-operations

Roger Ferrer Ibanez via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Jan 29 01:55:54 PST 2018


rogfer01 added inline comments.


================
Comment at: lib/Target/ARM/ARMISelLowering.cpp:4387
+    SDValue ShiftV = DAG.getNode(ISD::SRA, dl, VT, V, DAG.getConstant(31, dl, VT));
+    if (KVal == 0) {
+      SDValue NotShiftV = DAG.getNode(ISD::XOR, dl, VT, ShiftV, DAG.getConstant(-1, dl, VT));
----------------
Given that you don't use the value of `KVal` itself except to check if it is 0 or -1, you can simplify this to `isNullConstant(*K)` and `isAllOnesConstant(*K)`.


================
Comment at: test/CodeGen/ARM/atomic-op.ll:132
   ; CHECK: ldrex
-  ; CHECK: cmp
+  ; CHECK: bic
   ; CHECK: strex
----------------
If you don't want a `cmp` now you may want to consider adding a `CHECK-NOT: cmp`


https://reviews.llvm.org/D42574





More information about the llvm-commits mailing list