[llvm] r323628 - [NFC] fix trivial typos in comments and documents
Hiroshi Inoue via llvm-commits
llvm-commits at lists.llvm.org
Sun Jan 28 21:17:04 PST 2018
Author: inouehrs
Date: Sun Jan 28 21:17:03 2018
New Revision: 323628
URL: http://llvm.org/viewvc/llvm-project?rev=323628&view=rev
Log:
[NFC] fix trivial typos in comments and documents
"to to" -> "to"
Modified:
llvm/trunk/docs/GettingStarted.rst
llvm/trunk/docs/tutorial/LangImpl08.rst
llvm/trunk/include/llvm/Analysis/PtrUseVisitor.h
llvm/trunk/include/llvm/Analysis/ScalarEvolution.h
llvm/trunk/include/llvm/CodeGen/GlobalISel/RegBankSelect.h
llvm/trunk/include/llvm/Support/ToolOutputFile.h
llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
llvm/trunk/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
llvm/trunk/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
llvm/trunk/lib/Target/AMDGPU/GCNIterativeScheduler.cpp
llvm/trunk/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
llvm/trunk/lib/Target/AMDGPU/SIInsertWaits.cpp
llvm/trunk/lib/Target/PowerPC/PPCFastISel.cpp
llvm/trunk/lib/Target/X86/X86FastISel.cpp
llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
llvm/trunk/lib/Transforms/Scalar/GVNHoist.cpp
llvm/trunk/lib/Transforms/Scalar/LoopIdiomRecognize.cpp
llvm/trunk/test/CodeGen/AMDGPU/lds-alignment.ll
llvm/trunk/test/CodeGen/X86/fltused.ll
llvm/trunk/test/CodeGen/X86/fltused_function_pointer.ll
llvm/trunk/test/MC/ELF/gen-dwarf.s
llvm/trunk/test/Transforms/Inline/last-callsite.ll
llvm/trunk/utils/unittest/googletest/src/gtest-port.cc
Modified: llvm/trunk/docs/GettingStarted.rst
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/GettingStarted.rst?rev=323628&r1=323627&r2=323628&view=diff
==============================================================================
--- llvm/trunk/docs/GettingStarted.rst (original)
+++ llvm/trunk/docs/GettingStarted.rst Sun Jan 28 21:17:03 2018
@@ -324,7 +324,7 @@ However, some Linux distributions and so
extremely old versions of GCC. These steps attempt to help you upgrade you
compiler even on such a system. However, if at all possible, we encourage you
to use a recent version of a distribution with a modern system compiler that
-meets these requirements. Note that it is tempting to to install a prior
+meets these requirements. Note that it is tempting to install a prior
version of Clang and libc++ to be the host compiler, however libc++ was not
well tested or set up to build on Linux until relatively recently. As
a consequence, this guide suggests just using libstdc++ and a modern GCC as the
Modified: llvm/trunk/docs/tutorial/LangImpl08.rst
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/tutorial/LangImpl08.rst?rev=323628&r1=323627&r2=323628&view=diff
==============================================================================
--- llvm/trunk/docs/tutorial/LangImpl08.rst (original)
+++ llvm/trunk/docs/tutorial/LangImpl08.rst Sun Jan 28 21:17:03 2018
@@ -44,7 +44,7 @@ returns the target triple of the current
auto TargetTriple = sys::getDefaultTargetTriple();
-LLVM doesn't require us to to link in all the target
+LLVM doesn't require us to link in all the target
functionality. For example, if we're just using the JIT, we don't need
the assembly printers. Similarly, if we're only targeting certain
architectures, we can only link in the functionality for those
Modified: llvm/trunk/include/llvm/Analysis/PtrUseVisitor.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/PtrUseVisitor.h?rev=323628&r1=323627&r2=323628&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Analysis/PtrUseVisitor.h (original)
+++ llvm/trunk/include/llvm/Analysis/PtrUseVisitor.h Sun Jan 28 21:17:03 2018
@@ -275,7 +275,7 @@ protected:
enqueueUsers(GEPI);
}
- // No-op intrinsics which we know don't escape the pointer to to logic in
+ // No-op intrinsics which we know don't escape the pointer to logic in
// some other function.
void visitDbgInfoIntrinsic(DbgInfoIntrinsic &I) {}
void visitMemIntrinsic(MemIntrinsic &I) {}
Modified: llvm/trunk/include/llvm/Analysis/ScalarEvolution.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/ScalarEvolution.h?rev=323628&r1=323627&r2=323628&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Analysis/ScalarEvolution.h (original)
+++ llvm/trunk/include/llvm/Analysis/ScalarEvolution.h Sun Jan 28 21:17:03 2018
@@ -678,7 +678,7 @@ public:
const SCEV *LHS, const SCEV *RHS);
/// Test whether the backedge of the loop is protected by a conditional
- /// between LHS and RHS. This is used to to eliminate casts.
+ /// between LHS and RHS. This is used to eliminate casts.
bool isLoopBackedgeGuardedByCond(const Loop *L, ICmpInst::Predicate Pred,
const SCEV *LHS, const SCEV *RHS);
Modified: llvm/trunk/include/llvm/CodeGen/GlobalISel/RegBankSelect.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/GlobalISel/RegBankSelect.h?rev=323628&r1=323627&r2=323628&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/GlobalISel/RegBankSelect.h (original)
+++ llvm/trunk/include/llvm/CodeGen/GlobalISel/RegBankSelect.h Sun Jan 28 21:17:03 2018
@@ -22,7 +22,7 @@
/// of an instruction should live. It asks the target which banks may be
/// used for each operand of the instruction and what is the cost. Then,
/// it chooses the solution which minimize the cost of the instruction plus
-/// the cost of any move that may be needed to to the values into the right
+/// the cost of any move that may be needed to the values into the right
/// register bank.
/// In other words, the cost for an instruction on a register bank RegBank
/// is: Cost of I on RegBank plus the sum of the cost for bringing the
Modified: llvm/trunk/include/llvm/Support/ToolOutputFile.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/ToolOutputFile.h?rev=323628&r1=323627&r2=323628&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Support/ToolOutputFile.h (original)
+++ llvm/trunk/include/llvm/Support/ToolOutputFile.h Sun Jan 28 21:17:03 2018
@@ -43,7 +43,7 @@ class ToolOutputFile {
raw_fd_ostream OS;
public:
- /// This constructor's arguments are passed to to raw_fd_ostream's
+ /// This constructor's arguments are passed to raw_fd_ostream's
/// constructor.
ToolOutputFile(StringRef Filename, std::error_code &EC,
sys::fs::OpenFlags Flags);
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp?rev=323628&r1=323627&r2=323628&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp Sun Jan 28 21:17:03 2018
@@ -7267,7 +7267,7 @@ void SelectionDAGBuilder::visitInlineAsm
continue;
// If this is a memory input, and if the operand is not indirect, do what we
- // need to to provide an address for the memory input.
+ // need to provide an address for the memory input.
if (OpInfo.ConstraintType == TargetLowering::C_Memory &&
!OpInfo.isIndirect) {
assert((OpInfo.isMultipleAlternative ||
Modified: llvm/trunk/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/AMDGPUISelLowering.cpp?rev=323628&r1=323627&r2=323628&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/AMDGPUISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/AMDGPU/AMDGPUISelLowering.cpp Sun Jan 28 21:17:03 2018
@@ -1985,7 +1985,7 @@ SDValue AMDGPUTargetLowering::LowerFTRUN
const SDValue SignBitMask = DAG.getConstant(UINT32_C(1) << 31, SL, MVT::i32);
SDValue SignBit = DAG.getNode(ISD::AND, SL, MVT::i32, Hi, SignBitMask);
- // Extend back to to 64-bits.
+ // Extend back to 64-bits.
SDValue SignBit64 = DAG.getBuildVector(MVT::v2i32, SL, {Zero, SignBit});
SignBit64 = DAG.getNode(ISD::BITCAST, SL, MVT::i64, SignBit64);
Modified: llvm/trunk/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp?rev=323628&r1=323627&r2=323628&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp Sun Jan 28 21:17:03 2018
@@ -79,7 +79,7 @@ static cl::opt<bool> EnableLoadStoreVect
cl::init(true),
cl::Hidden);
-// Option to to control global loads scalarization
+// Option to control global loads scalarization
static cl::opt<bool> ScalarizeGlobal(
"amdgpu-scalarize-global-loads",
cl::desc("Enable global load scalarization"),
Modified: llvm/trunk/lib/Target/AMDGPU/GCNIterativeScheduler.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/GCNIterativeScheduler.cpp?rev=323628&r1=323627&r2=323628&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/GCNIterativeScheduler.cpp (original)
+++ llvm/trunk/lib/Target/AMDGPU/GCNIterativeScheduler.cpp Sun Jan 28 21:17:03 2018
@@ -452,7 +452,7 @@ unsigned GCNIterativeScheduler::tryMaxim
// TODO: assert Regions are sorted descending by pressure
const auto &ST = MF.getSubtarget<SISubtarget>();
const auto Occ = Regions.front()->MaxPressure.getOccupancy(ST);
- DEBUG(dbgs() << "Trying to to improve occupancy, target = " << TargetOcc
+ DEBUG(dbgs() << "Trying to improve occupancy, target = " << TargetOcc
<< ", current = " << Occ << '\n');
auto NewOcc = TargetOcc;
Modified: llvm/trunk/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/SIInsertWaitcnts.cpp?rev=323628&r1=323627&r2=323628&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/SIInsertWaitcnts.cpp (original)
+++ llvm/trunk/lib/Target/AMDGPU/SIInsertWaitcnts.cpp Sun Jan 28 21:17:03 2018
@@ -1837,7 +1837,7 @@ bool SIInsertWaitcnts::runOnMachineFunct
if (!MFI->isEntryFunction()) {
// Wait for any outstanding memory operations that the input registers may
- // depend on. We can't track them and it's better to to the wait after the
+ // depend on. We can't track them and it's better to the wait after the
// costly call sequence.
// TODO: Could insert earlier and schedule more liberally with operations
Modified: llvm/trunk/lib/Target/AMDGPU/SIInsertWaits.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/SIInsertWaits.cpp?rev=323628&r1=323627&r2=323628&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/SIInsertWaits.cpp (original)
+++ llvm/trunk/lib/Target/AMDGPU/SIInsertWaits.cpp Sun Jan 28 21:17:03 2018
@@ -687,7 +687,7 @@ bool SIInsertWaits::runOnMachineFunction
if (!MFI->isEntryFunction()) {
// Wait for any outstanding memory operations that the input registers may
- // depend on. We can't track them and it's better to to the wait after the
+ // depend on. We can't track them and it's better to the wait after the
// costly call sequence.
// TODO: Could insert earlier and schedule more liberally with operations
Modified: llvm/trunk/lib/Target/PowerPC/PPCFastISel.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCFastISel.cpp?rev=323628&r1=323627&r2=323628&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCFastISel.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCFastISel.cpp Sun Jan 28 21:17:03 2018
@@ -219,7 +219,7 @@ static Optional<PPC::Predicate> getCompa
// result consists of 4 bits, indicating lt, eq, gt and un (unordered),
// only one of which will be set. The result is generated by fcmpu
// instruction. However, bc instruction only inspects one of the first 3
- // bits, so when un is set, bc instruction may jump to to an undesired
+ // bits, so when un is set, bc instruction may jump to an undesired
// place.
//
// More specifically, if we expect an unordered comparison and un is set, we
Modified: llvm/trunk/lib/Target/X86/X86FastISel.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86FastISel.cpp?rev=323628&r1=323627&r2=323628&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86FastISel.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86FastISel.cpp Sun Jan 28 21:17:03 2018
@@ -2675,7 +2675,7 @@ bool X86FastISel::fastLowerIntrinsicCall
(FrameReg == X86::EBP && VT == MVT::i32)) &&
"Invalid Frame Register!");
- // Always make a copy of the frame register to to a vreg first, so that we
+ // Always make a copy of the frame register to a vreg first, so that we
// never directly reference the frame register (the TwoAddressInstruction-
// Pass doesn't like that).
unsigned SrcReg = createResultReg(RC);
Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=323628&r1=323627&r2=323628&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Sun Jan 28 21:17:03 2018
@@ -13917,7 +13917,7 @@ static SDValue lowerV4X128VectorShuffle(
return insert128BitVector(V1, Subvec, V2Index * 2, DAG, DL);
}
- // Try to lower to to vshuf64x2/vshuf32x4.
+ // Try to lower to vshuf64x2/vshuf32x4.
SDValue Ops[2] = {DAG.getUNDEF(VT), DAG.getUNDEF(VT)};
unsigned PermMask = 0;
// Insure elements came from the same Op.
Modified: llvm/trunk/lib/Transforms/Scalar/GVNHoist.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/GVNHoist.cpp?rev=323628&r1=323627&r2=323628&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/GVNHoist.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/GVNHoist.cpp Sun Jan 28 21:17:03 2018
@@ -570,7 +570,7 @@ private:
// The ides is inspired from:
// "Partial Redundancy Elimination in SSA Form"
// ROBERT KENNEDY, SUN CHAN, SHIN-MING LIU, RAYMOND LO, PENG TU and FRED CHOW
- // They use similar idea in the forward graph to to find fully redundant and
+ // They use similar idea in the forward graph to find fully redundant and
// partially redundant expressions, here it is used in the inverse graph to
// find fully anticipable instructions at merge point (post-dominator in
// the inverse CFG).
Modified: llvm/trunk/lib/Transforms/Scalar/LoopIdiomRecognize.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/LoopIdiomRecognize.cpp?rev=323628&r1=323627&r2=323628&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/LoopIdiomRecognize.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/LoopIdiomRecognize.cpp Sun Jan 28 21:17:03 2018
@@ -1675,7 +1675,7 @@ void LoopIdiomRecognize::transformLoopTo
}
// Step 3: Note that the population count is exactly the trip count of the
- // loop in question, which enable us to to convert the loop from noncountable
+ // loop in question, which enable us to convert the loop from noncountable
// loop into a countable one. The benefit is twofold:
//
// - If the loop only counts population, the entire loop becomes dead after
Modified: llvm/trunk/test/CodeGen/AMDGPU/lds-alignment.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AMDGPU/lds-alignment.ll?rev=323628&r1=323627&r2=323628&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AMDGPU/lds-alignment.ll (original)
+++ llvm/trunk/test/CodeGen/AMDGPU/lds-alignment.ll Sun Jan 28 21:17:03 2018
@@ -22,7 +22,7 @@ define amdgpu_kernel void @test_no_round
ret void
}
-; There are two objects, so one requires padding to to be correctly
+; There are two objects, so one requires padding to be correctly
; aligned after the other.
; (38 -> 48) + 38 = 92
Modified: llvm/trunk/test/CodeGen/X86/fltused.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fltused.ll?rev=323628&r1=323627&r2=323628&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/fltused.ll (original)
+++ llvm/trunk/test/CodeGen/X86/fltused.ll Sun Jan 28 21:17:03 2018
@@ -1,4 +1,4 @@
-; The purpose of this test to to verify that the fltused symbol is emitted when
+; The purpose of this test to verify that the fltused symbol is emitted when
; any function is called with floating point arguments on Windows. And that it
; is not emitted otherwise.
Modified: llvm/trunk/test/CodeGen/X86/fltused_function_pointer.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fltused_function_pointer.ll?rev=323628&r1=323627&r2=323628&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/fltused_function_pointer.ll (original)
+++ llvm/trunk/test/CodeGen/X86/fltused_function_pointer.ll Sun Jan 28 21:17:03 2018
@@ -1,4 +1,4 @@
-; The purpose of this test to to verify that the fltused symbol is emitted when
+; The purpose of this test to verify that the fltused symbol is emitted when
; any function is called with floating point arguments on Windows. And that it
; is not emitted otherwise.
Modified: llvm/trunk/test/MC/ELF/gen-dwarf.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/gen-dwarf.s?rev=323628&r1=323627&r2=323628&view=diff
==============================================================================
--- llvm/trunk/test/MC/ELF/gen-dwarf.s (original)
+++ llvm/trunk/test/MC/ELF/gen-dwarf.s Sun Jan 28 21:17:03 2018
@@ -8,7 +8,7 @@
// Test that on ELF:
-// 1. the debug info has a relocation to debug_abbrev and one to to debug_line.
+// 1. the debug info has a relocation to debug_abbrev and one to debug_line.
// 2. the debug_aranges has relocations to text and debug_line.
Modified: llvm/trunk/test/Transforms/Inline/last-callsite.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/Inline/last-callsite.ll?rev=323628&r1=323627&r2=323628&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/Inline/last-callsite.ll (original)
+++ llvm/trunk/test/Transforms/Inline/last-callsite.ll Sun Jan 28 21:17:03 2018
@@ -51,7 +51,7 @@ entry:
; The 'test2_' prefixed functions test that we can discover the last callsite
-; bonus after having inlined the prior call site. For this to to work, we need
+; bonus after having inlined the prior call site. For this to work, we need
; a callsite dependent cost so we have a trivial predicate guarding all the
; cost, and set that in a particular direction.
Modified: llvm/trunk/utils/unittest/googletest/src/gtest-port.cc
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/unittest/googletest/src/gtest-port.cc?rev=323628&r1=323627&r2=323628&view=diff
==============================================================================
--- llvm/trunk/utils/unittest/googletest/src/gtest-port.cc (original)
+++ llvm/trunk/utils/unittest/googletest/src/gtest-port.cc Sun Jan 28 21:17:03 2018
@@ -496,7 +496,7 @@ class ThreadLocalRegistryImpl {
FALSE,
thread_id);
GTEST_CHECK_(thread != NULL);
- // We need to to pass a valid thread ID pointer into CreateThread for it
+ // We need to pass a valid thread ID pointer into CreateThread for it
// to work correctly under Win98.
DWORD watcher_thread_id;
HANDLE watcher_thread = ::CreateThread(
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