[llvm] r323190 - [X86][SSE] LowerBUILD_VECTORAsVariablePermute - fix PSHUFB source/index operand ordering

[Hans Wennborg via llvm-commits]

Merged to 6.0 in r323335.

On Tue, Jan 23, 2018 at 12:39 PM, Simon Pilgrim via llvm-commits
<llvm-commits at lists.llvm.org> wrote:
> Author: rksimon
> Date: Tue Jan 23 03:39:06 2018
> New Revision: 323190
>
> URL: http://llvm.org/viewvc/llvm-project?rev=323190&view=rev
> Log:
> [X86][SSE] LowerBUILD_VECTORAsVariablePermute - fix PSHUFB source/index operand ordering
>
> As detailed in rL317463, PSHUFB (like most variable shuffle instructions) uses Op[0] for the source vector and Op[1] for the shuffle index vector, VPERMV works in reverse which is probably where the confusion comes from.
>
> Differential Revision: https://reviews.llvm.org/D42380
>
> Modified:
>     llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
>     llvm/trunk/test/CodeGen/X86/var-permute-128.ll
>
> Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=323190&r1=323189&r2=323190&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
> +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Tue Jan 23 03:39:06 2018
> @@ -7903,8 +7903,9 @@ LowerBUILD_VECTORAsVariablePermute(SDVal
>          DAG.getNode(ISD::INSERT_SUBVECTOR, SDLoc(SrcVec), VT, DAG.getUNDEF(VT),
>                      SrcVec, DAG.getIntPtrConstant(0, SDLoc(SrcVec)));
>    }
> -  return DAG.getNode(VT == MVT::v16i8 ? X86ISD::PSHUFB : X86ISD::VPERMV,
> -                     SDLoc(V), VT, IndicesVec, SrcVec);
> +  if (VT == MVT::v16i8)
> +    return DAG.getNode(X86ISD::PSHUFB, SDLoc(V), VT, SrcVec, IndicesVec);
> +  return DAG.getNode(X86ISD::VPERMV, SDLoc(V), VT, IndicesVec, SrcVec);
>  }
>
>  SDValue
>
> Modified: llvm/trunk/test/CodeGen/X86/var-permute-128.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/var-permute-128.ll?rev=323190&r1=323189&r2=323190&view=diff
> ==============================================================================
> --- llvm/trunk/test/CodeGen/X86/var-permute-128.ll (original)
> +++ llvm/trunk/test/CodeGen/X86/var-permute-128.ll Tue Jan 23 03:39:06 2018
> @@ -207,13 +207,12 @@ define <8 x i16> @var_shuffle_v8i16(<8 x
>  define <16 x i8> @var_shuffle_v16i8(<16 x i8> %v, <16 x i8> %indices) nounwind {
>  ; SSSE3-LABEL: var_shuffle_v16i8:
>  ; SSSE3:       # %bb.0:
> -; SSSE3-NEXT:    pshufb %xmm0, %xmm1
> -; SSSE3-NEXT:    movdqa %xmm1, %xmm0
> +; SSSE3-NEXT:    pshufb %xmm1, %xmm0
>  ; SSSE3-NEXT:    retq
>  ;
>  ; AVX-LABEL: var_shuffle_v16i8:
>  ; AVX:       # %bb.0:
> -; AVX-NEXT:    vpshufb %xmm0, %xmm1, %xmm0
> +; AVX-NEXT:    vpshufb %xmm1, %xmm0, %xmm0
>  ; AVX-NEXT:    retq
>    %index0 = extractelement <16 x i8> %indices, i32 0
>    %index1 = extractelement <16 x i8> %indices, i32 1
>
>
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