[PATCH] D42196: [compiler-rt] [builtins] Align addresses to cache lines in __clear_cache for aarch64

[Peter Smith via Phabricator via llvm-commits]

peter.smith added a comment.

I guess this comes down to the interpretation of (begin, end] when you can only clear a cache line at a time. I think that this makes sense as it matches the __powerpc64__ below, Linux also follows this approach. I'm not sure how this is done on BSD and Darwin.

Linux links:

- Implementation: http://elixir.free-electrons.com/linux/latest/source/arch/arm64/mm/cache.S
- Interface with comment "Start addresses are inclusive and end addresses are exclusive; start addresses should be rounded down, end addresses up.": https://elixir.free-electrons.com/linux/latest/source/arch/arm64/include/asm/cacheflush.h


Repository:
  rCRT Compiler Runtime

https://reviews.llvm.org/D42196