[llvm] r322878 - [AArch64][GlobalISel] Add isel support for global values in the large code model.

[Hans Wennborg via llvm-commits]

I've merged it in r323103.

Anyone can merge (using the script in utils/release/merge.sh), but I
need to approve.

Thanks,
Hans

On Thu, Jan 18, 2018 at 8:29 PM, Amara Emerson <aemerson at apple.com> wrote:
>> On 18 Jan 2018, at 19:21, Amara Emerson via llvm-commits <llvm-commits at lists.llvm.org> wrote:
>>
>> Author: aemerson
>> Date: Thu Jan 18 11:21:27 2018
>> New Revision: 322878
>>
>> URL: http://llvm.org/viewvc/llvm-project?rev=322878&view=rev
>> Log:
>> [AArch64][GlobalISel] Add isel support for global values in the large code model.
>>
>> Fixes PR35958.
>>
>> Differential Revision: https://reviews.llvm.org/D42175
>>
>> Added:
>>    llvm/trunk/test/CodeGen/AArch64/GlobalISel/select-gv-cmodel-large.mir
>> Modified:
>>    llvm/trunk/lib/Target/AArch64/AArch64InstructionSelector.cpp
>>
>> Modified: llvm/trunk/lib/Target/AArch64/AArch64InstructionSelector.cpp
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64InstructionSelector.cpp?rev=322878&r1=322877&r2=322878&view=diff
>> ==============================================================================
>> --- llvm/trunk/lib/Target/AArch64/AArch64InstructionSelector.cpp (original)
>> +++ llvm/trunk/lib/Target/AArch64/AArch64InstructionSelector.cpp Thu Jan 18 11:21:27 2018
>> @@ -870,6 +870,40 @@ bool AArch64InstructionSelector::select(
>>     if (OpFlags & AArch64II::MO_GOT) {
>>       I.setDesc(TII.get(AArch64::LOADgot));
>>       I.getOperand(1).setTargetFlags(OpFlags);
>> +    } else if (TM.getCodeModel() == CodeModel::Large) {
>> +      // Materialize the global using movz/movk instructions.
>> +      unsigned MovZDstReg = MRI.createVirtualRegister(&AArch64::GPR64RegClass);
>> +      auto InsertPt = std::next(I.getIterator());
>> +      auto MovZ =
>> +          BuildMI(MBB, InsertPt, I.getDebugLoc(), TII.get(AArch64::MOVZXi))
>> +              .addDef(MovZDstReg);
>> +      MovZ->addOperand(MF, I.getOperand(1));
>> +      MovZ->getOperand(1).setTargetFlags(OpFlags | AArch64II::MO_G0 |
>> +                                         AArch64II::MO_NC);
>> +      MovZ->addOperand(MF, MachineOperand::CreateImm(0));
>> +      constrainSelectedInstRegOperands(*MovZ, TII, TRI, RBI);
>> +
>> +      auto BuildMovK = [&](unsigned SrcReg, unsigned char Flags,
>> +                           unsigned Offset, unsigned ForceDstReg) {
>> +        unsigned DstReg =
>> +            ForceDstReg ? ForceDstReg
>> +                        : MRI.createVirtualRegister(&AArch64::GPR64RegClass);
>> +        auto MovI = BuildMI(MBB, InsertPt, MovZ->getDebugLoc(),
>> +                            TII.get(AArch64::MOVKXi))
>> +                        .addDef(DstReg)
>> +                        .addReg(SrcReg);
>> +        MovI->addOperand(MF, MachineOperand::CreateGA(
>> +                                 GV, MovZ->getOperand(1).getOffset(), Flags));
>> +        MovI->addOperand(MF, MachineOperand::CreateImm(Offset));
>> +        constrainSelectedInstRegOperands(*MovI, TII, TRI, RBI);
>> +        return DstReg;
>> +      };
>> +      unsigned DstReg = BuildMovK(MovZ->getOperand(0).getReg(),
>> +                                  AArch64II::MO_G1 | AArch64II::MO_NC, 16, 0);
>> +      DstReg = BuildMovK(DstReg, AArch64II::MO_G2 | AArch64II::MO_NC, 32, 0);
>> +      BuildMovK(DstReg, AArch64II::MO_G3, 48, I.getOperand(0).getReg());
>> +      I.eraseFromParent();
>> +      return true;
>>     } else {
>>       I.setDesc(TII.get(AArch64::MOVaddr));
>>       I.getOperand(1).setTargetFlags(OpFlags | AArch64II::MO_PAGE);
>>
>> Added: llvm/trunk/test/CodeGen/AArch64/GlobalISel/select-gv-cmodel-large.mir
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/GlobalISel/select-gv-cmodel-large.mir?rev=322878&view=auto
>> ==============================================================================
>> --- llvm/trunk/test/CodeGen/AArch64/GlobalISel/select-gv-cmodel-large.mir (added)
>> +++ llvm/trunk/test/CodeGen/AArch64/GlobalISel/select-gv-cmodel-large.mir Thu Jan 18 11:21:27 2018
>> @@ -0,0 +1,61 @@
>> +# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
>> +# RUN: llc -mtriple=aarch64-linux-gnu -code-model=large -run-pass=instruction-select -verify-machineinstrs -O0 %s -o - | FileCheck %s
>> +--- |
>> +  target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
>> +
>> +  @foo1 = common global [1073741824 x i32] zeroinitializer, align 4
>> +  @foo2 = common global [1073741824 x i32] zeroinitializer, align 4
>> +
>> +  define i32 @gv_large() {
>> +  entry:
>> +    %retval = alloca i32, align 4
>> +    store i32 0, i32* %retval, align 4
>> +    %0 = load i32, i32* getelementptr inbounds ([1073741824 x i32], [1073741824 x i32]* @foo1, i64 0, i64 0), align 4
>> +    %1 = load i32, i32* getelementptr inbounds ([1073741824 x i32], [1073741824 x i32]* @foo2, i64 0, i64 0), align 4
>> +    %add = add nsw i32 %0, %1
>> +    ret i32 %add
>> +  }
>> +
>> +...
>
> Hi Hans,
>
> Can we merge this to the branch? (Does it need to go through you or can anyone do it?)
>
> Thanks,
> Amara
>