[PATCH] D42100: Fix codegen of stores of vectors with non byte-sized elements.

[Eli Friedman via Phabricator via llvm-commits]

efriedma added subscribers: craig.topper, RKSimon.
efriedma added a comment.

> I don't see any asserts in the getNode() method.

Really?  I see a bunch.  (getNode() is overloaded; make sure you're looking at the version for nodes with two operands.)  But anyway, that can be a separate patch.



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Comment at: test/CodeGen/X86/avx512-mask-op.ll:2786
 ; AVX512DQ-NEXT:    vpslld $31, %zmm0, %zmm0
+; AVX512DQ-NEXT:    vptestmd %zmm0, %zmm0, %k5
+; AVX512DQ-NEXT:    kshiftrw $15, %k5, %k0
----------------
This new code is substantially worse than the old code, without solving any correctness problem.

Specifically, the key here is that you can split without scalarizing if the size of each half in bits is a multiple of 8.  So on AVX-512, we can split a `<64 x i1>` store into four legal `<16 x i1>` stores.


https://reviews.llvm.org/D42100