[PATCH] D41653: [RISCV] Initial porting GlobalISel

[Leslie Zhai via Phabricator via llvm-commits]

xiangzhai added a comment.

Hi Alex,

Thanks for your pointing out my fault clearly!

The patch is only able to work for such simple testcase:

  define void @f0() {
    ret void
  }
  
  define i32 @f1() {
    ret i32 0
  }
  
  define i32 @f2() {
    %1 = call i32 @f1()
    ret i32 %1
  }

But failed to work for testcase "test/CodeGen/RISCV/calling-conv.ll", so I need to implement https://reviews.llvm.org/D41700 and https://reviews.llvm.org/D41774 firstly, then I will rebase this patch.

PS: there is no response about `RegisterBank` in llvm-dev ML, and I have to cover ALL instructions for Legalizer and InstructionSelector.

Regards,
Leslie Zhai


Repository:
  rL LLVM

https://reviews.llvm.org/D41653