[PATCH] D41879: [X86] Added support for nocf_check attribute for indirect Branch Tracking

[Craig Topper via Phabricator via llvm-commits]

craig.topper added a comment.

You can have two instructions use the same encoding if you mark one with isAsmParserOnly = 1. See XACQUIRE_PREFIX and XRELEASE_PREFIX. isAsmParserOnly will hide from the disassembler that checks encoding collisions.

For sure you can't emit two instructions based on TSFlags.

I thought maybe with MIFlags you could catch the opcodes in X86AsmPrinter.cpp just before they are emitted and emit two instructions instead of one based on the MIFlag. It would be target specific code.

But I think separate opcodes is probably the easiest solution.

@RKSimon do you have any thoughts on this?


Repository:
  rL LLVM

https://reviews.llvm.org/D41879