[PATCH] D42100: Fix codegen of stores of vectors with non byte-sized elements.

[Jonas Paulsson via Phabricator via llvm-commits]

jonpa updated this revision to Diff 130133.
jonpa added a comment.

I found that if I extract the element into its native width, and then truncate, everything works. I then had to narrow this handling to integer types, as I saw X86 failing with v4f80 vectors since TRUNCATE is only for integers.

About the problem in computeKnownBits:

computeKnownBits() gets called with Known of 32 bits, to analyze an EXTRACT_VECTOR_ELT, which is an v2i64 vector. Therefore Known becomes 64 bits wide, and the calling computeKnownBits() crashes on

  Known.One &= Known2.One;

, as Known is 32 bits.

I fixed this by

  diff --git a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
  index 837173e..9f98bdd 100644
  --- a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
  +++ b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
  @@ -2805,6 +2805,10 @@ void SelectionDAG::computeKnownBits(SDValue Op, KnownBits &Known,
       }
       if (BitWidth > EltBitWidth)
         Known = Known.zext(BitWidth);
  +    // If the extracted element is wider than BitWidth, truncate to match
  +    // callers expectations.
  +    if (Known.getBitWidth() > BitWidth)
  +      Known = Known.trunc(BitWidth);
       break;
     }
     case ISD::INSERT_VECTOR_ELT: {

, which made the DAGCombiner work for the test case (before trying the explit truncate, which worked without this)

Not sure if this patch should still go in, or if there should be an assert that a EXTRACT_VECTOR_ELT should not implicitly truncate?

> I don't see a change to DAGTypeLegalizer::SplitVecOp_STORE?  (I think you're currently miscompiling the `<8 x i31>` testcase.)

You're right, I added the same handling there.

Tests updated.


https://reviews.llvm.org/D42100

Files:
  include/llvm/CodeGen/TargetLowering.h
  lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
  lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
  lib/CodeGen/SelectionDAG/TargetLowering.cpp
  test/CodeGen/Generic/store_nonbytesized_vecs.ll
  test/CodeGen/SystemZ/vec-move-17.ll
  test/CodeGen/X86/avx512-mask-op.ll
  test/CodeGen/X86/bitcast-and-setcc-512.ll
  test/CodeGen/X86/bitcast-setcc-512.ll
  test/CodeGen/X86/clear_upper_vector_element_bits.ll
  test/CodeGen/X86/pr20011.ll
  test/CodeGen/X86/trunc-store.ll
  test/CodeGen/X86/vector-compare-results.ll