[llvm] r322543 - [DebugInfo] Unify dumping of address ranges

Jonas Devlieghere via llvm-commits llvm-commits at lists.llvm.org
Tue Jan 16 03:17:57 PST 2018


Author: jdevlieghere
Date: Tue Jan 16 03:17:57 2018
New Revision: 322543

URL: http://llvm.org/viewvc/llvm-project?rev=322543&view=rev
Log:
[DebugInfo] Unify dumping of address ranges

Summary:
This patch unifies the printing of address ranges as [0x0, 0x1).

rdar://34822059

Reviewers: aprantl, dblaikie

Subscribers: mehdi_amini, llvm-commits

Differential Revision: https://reviews.llvm.org/D42056

Modified:
    llvm/trunk/include/llvm/DebugInfo/DWARF/DWARFDebugArangeSet.h
    llvm/trunk/include/llvm/DebugInfo/DWARF/DWARFDebugRangeList.h
    llvm/trunk/lib/DebugInfo/DWARF/DWARFDebugArangeSet.cpp
    llvm/trunk/lib/DebugInfo/DWARF/DWARFDebugLoc.cpp
    llvm/trunk/lib/DebugInfo/DWARF/DWARFDebugRangeList.cpp
    llvm/trunk/lib/DebugInfo/DWARF/DWARFDie.cpp
    llvm/trunk/test/CodeGen/ARM/debug-info-blocks.ll
    llvm/trunk/test/CodeGen/ARM/debug-info-sreg2.ll
    llvm/trunk/test/DebugInfo/AArch64/asan-stack-vars.ll
    llvm/trunk/test/DebugInfo/ARM/PR26163.ll
    llvm/trunk/test/DebugInfo/ARM/partial-subreg.ll
    llvm/trunk/test/DebugInfo/MIR/AArch64/clobber-sp.mir
    llvm/trunk/test/DebugInfo/MIR/ARM/split-superreg-piece.mir
    llvm/trunk/test/DebugInfo/MIR/ARM/split-superreg.mir
    llvm/trunk/test/DebugInfo/Mips/dsr-fixed-objects.ll
    llvm/trunk/test/DebugInfo/Sparc/subreg.ll
    llvm/trunk/test/DebugInfo/X86/DW_AT_location-reference.ll
    llvm/trunk/test/DebugInfo/X86/PR26148.ll
    llvm/trunk/test/DebugInfo/X86/constant-loclist.ll
    llvm/trunk/test/DebugInfo/X86/dbg-addr.ll
    llvm/trunk/test/DebugInfo/X86/dbg-declare-arg.ll
    llvm/trunk/test/DebugInfo/X86/dbg-value-const-byref.ll
    llvm/trunk/test/DebugInfo/X86/dbg-value-frame-index.ll
    llvm/trunk/test/DebugInfo/X86/dbg-value-regmask-clobber.ll
    llvm/trunk/test/DebugInfo/X86/debug-loc-asan.ll
    llvm/trunk/test/DebugInfo/X86/debug-loc-frame.ll
    llvm/trunk/test/DebugInfo/X86/debug-loc-offset.ll
    llvm/trunk/test/DebugInfo/X86/dw_op_minus_direct.ll
    llvm/trunk/test/DebugInfo/X86/dwarfdump-debug-loc-simple.test
    llvm/trunk/test/DebugInfo/X86/dwarfdump-ranges-baseaddr-exe.s
    llvm/trunk/test/DebugInfo/X86/dwarfdump-ranges-baseaddr.s
    llvm/trunk/test/DebugInfo/X86/dwarfdump-ranges-unrelocated.s
    llvm/trunk/test/DebugInfo/X86/float_const_loclist.ll
    llvm/trunk/test/DebugInfo/X86/inlined-formal-parameter.ll
    llvm/trunk/test/DebugInfo/X86/live-debug-variables.ll
    llvm/trunk/test/DebugInfo/X86/pieces-1.ll
    llvm/trunk/test/DebugInfo/X86/pieces-2.ll
    llvm/trunk/test/DebugInfo/X86/pieces-3.ll
    llvm/trunk/test/DebugInfo/X86/spill-nospill.ll
    llvm/trunk/test/DebugInfo/X86/sret.ll
    llvm/trunk/test/DebugInfo/X86/stack-value-piece.ll
    llvm/trunk/test/DebugInfo/X86/subregisters.ll
    llvm/trunk/test/DebugInfo/dwarfdump-ranges.test
    llvm/trunk/test/MC/ARM/dwarf-asm-multiple-sections-dwarf-2.s
    llvm/trunk/test/MC/ARM/dwarf-asm-multiple-sections.s
    llvm/trunk/test/MC/ARM/dwarf-asm-nonstandard-section.s
    llvm/trunk/test/MC/ARM/dwarf-asm-single-section.s
    llvm/trunk/test/tools/dsymutil/X86/basic-linking-x86.test
    llvm/trunk/test/tools/dsymutil/X86/basic-lto-dw4-linking-x86.test
    llvm/trunk/test/tools/dsymutil/X86/basic-lto-linking-x86.test
    llvm/trunk/test/tools/llvm-dwarfdump/X86/debug_loc_offset.test
    llvm/trunk/test/tools/llvm-dwarfdump/X86/debugloc.s
    llvm/trunk/test/tools/llvm-dwarfdump/X86/verify_die_ranges.s

Modified: llvm/trunk/include/llvm/DebugInfo/DWARF/DWARFDebugArangeSet.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/DebugInfo/DWARF/DWARFDebugArangeSet.h?rev=322543&r1=322542&r2=322543&view=diff
==============================================================================
--- llvm/trunk/include/llvm/DebugInfo/DWARF/DWARFDebugArangeSet.h (original)
+++ llvm/trunk/include/llvm/DebugInfo/DWARF/DWARFDebugArangeSet.h Tue Jan 16 03:17:57 2018
@@ -43,6 +43,7 @@ public:
     uint64_t Length;
 
     uint64_t getEndAddress() const { return Address + Length; }
+    void dump(raw_ostream &OS, uint32_t AddressSize) const;
   };
 
 private:

Modified: llvm/trunk/include/llvm/DebugInfo/DWARF/DWARFDebugRangeList.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/DebugInfo/DWARF/DWARFDebugRangeList.h?rev=322543&r1=322542&r2=322543&view=diff
==============================================================================
--- llvm/trunk/include/llvm/DebugInfo/DWARF/DWARFDebugRangeList.h (original)
+++ llvm/trunk/include/llvm/DebugInfo/DWARF/DWARFDebugRangeList.h Tue Jan 16 03:17:57 2018
@@ -50,6 +50,8 @@ struct DWARFAddressRange {
       return LowPC <= RHS.HighPC && RHS.HighPC <= HighPC;
     return false;
   }
+
+  void dump(raw_ostream &OS, uint32_t AddressSize) const;
 };
 
 static inline bool operator<(const DWARFAddressRange &LHS,

Modified: llvm/trunk/lib/DebugInfo/DWARF/DWARFDebugArangeSet.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/DebugInfo/DWARF/DWARFDebugArangeSet.cpp?rev=322543&r1=322542&r2=322543&view=diff
==============================================================================
--- llvm/trunk/lib/DebugInfo/DWARF/DWARFDebugArangeSet.cpp (original)
+++ llvm/trunk/lib/DebugInfo/DWARF/DWARFDebugArangeSet.cpp Tue Jan 16 03:17:57 2018
@@ -17,6 +17,13 @@
 
 using namespace llvm;
 
+void DWARFDebugArangeSet::Descriptor::dump(raw_ostream &OS,
+                                           uint32_t AddressSize) const {
+  OS << format("[0x%*.*" PRIx64 ", ", AddressSize * 2, AddressSize * 2, Address)
+     << format(" 0x%*.*" PRIx64 ")", AddressSize * 2, AddressSize * 2,
+               getEndAddress());
+}
+
 void DWARFDebugArangeSet::clear() {
   Offset = -1U;
   std::memset(&HeaderData, 0, sizeof(Header));
@@ -98,10 +105,8 @@ void DWARFDebugArangeSet::dump(raw_ostre
      << format("cu_offset = 0x%8.8x, addr_size = 0x%2.2x, seg_size = 0x%2.2x\n",
                HeaderData.CuOffset, HeaderData.AddrSize, HeaderData.SegSize);
 
-  const uint32_t hex_width = HeaderData.AddrSize * 2;
   for (const auto &Desc : ArangeDescriptors) {
-    OS << format("[0x%*.*" PRIx64 " -", hex_width, hex_width, Desc.Address)
-       << format(" 0x%*.*" PRIx64 ")\n",
-                 hex_width, hex_width, Desc.getEndAddress());
+    Desc.dump(OS, HeaderData.AddrSize);
+    OS << '\n';
   }
 }

Modified: llvm/trunk/lib/DebugInfo/DWARF/DWARFDebugLoc.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/DebugInfo/DWARF/DWARFDebugLoc.cpp?rev=322543&r1=322542&r2=322543&view=diff
==============================================================================
--- llvm/trunk/lib/DebugInfo/DWARF/DWARFDebugLoc.cpp (original)
+++ llvm/trunk/lib/DebugInfo/DWARF/DWARFDebugLoc.cpp Tue Jan 16 03:17:57 2018
@@ -43,8 +43,10 @@ void DWARFDebugLoc::LocationList::dump(r
   for (const Entry &E : Entries) {
     OS << '\n';
     OS.indent(Indent);
-    OS << format("0x%016" PRIx64, E.Begin) << " - "
-       << format("0x%016" PRIx64, E.End) << ": ";
+    OS << format("[0x%*.*" PRIx64 ", ", AddressSize * 2, AddressSize * 2,
+                 E.Begin)
+       << format(" 0x%*.*" PRIx64 ")", AddressSize * 2, AddressSize * 2, E.End);
+    OS << ": ";
 
     dumpExpression(OS, E.Loc, IsLittleEndian, AddressSize, MRI);
   }

Modified: llvm/trunk/lib/DebugInfo/DWARF/DWARFDebugRangeList.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/DebugInfo/DWARF/DWARFDebugRangeList.cpp?rev=322543&r1=322542&r2=322543&view=diff
==============================================================================
--- llvm/trunk/lib/DebugInfo/DWARF/DWARFDebugRangeList.cpp (original)
+++ llvm/trunk/lib/DebugInfo/DWARF/DWARFDebugRangeList.cpp Tue Jan 16 03:17:57 2018
@@ -17,9 +17,15 @@
 
 using namespace llvm;
 
+void DWARFAddressRange::dump(raw_ostream &OS, uint32_t AddressSize) const {
+
+  OS << format("[0x%*.*" PRIx64 ", ", AddressSize * 2, AddressSize * 2, LowPC)
+     << format(" 0x%*.*" PRIx64 ")", AddressSize * 2, AddressSize * 2, HighPC);
+}
+
 raw_ostream &llvm::operator<<(raw_ostream &OS, const DWARFAddressRange &R) {
-  return OS << format("[0x%16.16" PRIx64 ", 0x%16.16" PRIx64 ")", R.LowPC,
-                      R.HighPC);
+  R.dump(OS, /* AddressSize */ 8);
+  return OS;
 }
 
 void DWARFDebugRangeList::clear() {

Modified: llvm/trunk/lib/DebugInfo/DWARF/DWARFDie.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/DebugInfo/DWARF/DWARFDie.cpp?rev=322543&r1=322542&r2=322543&view=diff
==============================================================================
--- llvm/trunk/lib/DebugInfo/DWARF/DWARFDie.cpp (original)
+++ llvm/trunk/lib/DebugInfo/DWARF/DWARFDie.cpp Tue Jan 16 03:17:57 2018
@@ -62,13 +62,11 @@ static void dumpRanges(const DWARFObject
   if (DumpOpts.Verbose)
     SectionNames = Obj.getSectionNames();
 
-  for (size_t I = 0; I < Ranges.size(); ++I) {
-    const DWARFAddressRange &R = Ranges[I];
+  for (const DWARFAddressRange &R : Ranges) {
 
     OS << '\n';
     OS.indent(Indent);
-    OS << format("[0x%0*" PRIx64 " - 0x%0*" PRIx64 ")", AddressSize * 2,
-                 R.LowPC, AddressSize * 2, R.HighPC);
+    R.dump(OS, AddressSize);
 
     if (SectionNames.empty() || R.SectionIndex == -1ULL)
       continue;

Modified: llvm/trunk/test/CodeGen/ARM/debug-info-blocks.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/debug-info-blocks.ll?rev=322543&r1=322542&r2=322543&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/debug-info-blocks.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/debug-info-blocks.ll Tue Jan 16 03:17:57 2018
@@ -6,8 +6,8 @@
 ; CHECK: DW_TAG_variable
 ; CHECK-NOT: DW_TAG
 ; CHECK-NEXT: DW_AT_location [DW_FORM_sec_offset]
-; CHECK-NEXT:    0x{{.*}} - 0x{{.*}}: {{.*}} DW_OP_plus_uconst 0x4, DW_OP_deref, DW_OP_plus_uconst 0x18
-; CHECK-NEXT:    0x{{.*}} - 0x{{.*}}: {{.*}} DW_OP_plus_uconst 0x4, DW_OP_deref, DW_OP_plus_uconst 0x18
+; CHECK-NEXT:    [0x{{.*}}, 0x{{.*}}): {{.*}} DW_OP_plus_uconst 0x4, DW_OP_deref, DW_OP_plus_uconst 0x18
+; CHECK-NEXT:    [0x{{.*}}, 0x{{.*}}): {{.*}} DW_OP_plus_uconst 0x4, DW_OP_deref, DW_OP_plus_uconst 0x18
 ; CHECK-NEXT: DW_AT_name {{.*}} "mydata"
 
 ; Radar 9331779

Modified: llvm/trunk/test/CodeGen/ARM/debug-info-sreg2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/debug-info-sreg2.ll?rev=322543&r1=322542&r2=322543&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/debug-info-sreg2.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/debug-info-sreg2.ll Tue Jan 16 03:17:57 2018
@@ -7,7 +7,7 @@ target triple = "thumbv7-apple-macosx10.
 ; of the size of the location description.
 
 ; CHECK: 0x00000000:
-; CHECK-NEXT:        0x{{[0-9]*[a-f]*}} - 0x{{[0-9]*[a-f]*}}: DW_OP_regx D8
+; CHECK-NEXT:        [0x{{[0-9]*[a-f]*}}, 0x{{[0-9]*[a-f]*}}): DW_OP_regx D8
 
 define void @_Z3foov() optsize ssp !dbg !1 {
 entry:

Modified: llvm/trunk/test/DebugInfo/AArch64/asan-stack-vars.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/AArch64/asan-stack-vars.ll?rev=322543&r1=322542&r2=322543&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/AArch64/asan-stack-vars.ll (original)
+++ llvm/trunk/test/DebugInfo/AArch64/asan-stack-vars.ll Tue Jan 16 03:17:57 2018
@@ -14,7 +14,7 @@
 ;   @interface Object : NSObject
 ;   - (instancetype)initWithSize:(CGSize)size;
 ;   - (id)aMessage;
-;   @end            
+;   @end
 ;   @implementation MyObject
 ;   + (id)doWithSize:(CGSize)imageSize andObject:(id)object {
 ;     return [object aMessage];
@@ -28,9 +28,9 @@
 ; CHECK: "_cmd"
 ; CHECK: DW_TAG_formal_parameter
 ; CHECK-NEXT: DW_AT_location
-; CHECK-NEXT:   0x{{0*}} - 0x{{.*}}:
+; CHECK-NEXT:   [0x{{0*}}, 0x{{.*}}):
 ; CHECK-NOT:    DW_AT_
-; CHECK:        0x{{.*}} - [[FN_END]]:
+; CHECK:        [0x{{.*}}, [[FN_END]]):
 ; CHECK-NEXT: DW_AT_name {{.*}}"imageSize"
 
 ; ModuleID = 'm.m'

Modified: llvm/trunk/test/DebugInfo/ARM/PR26163.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/ARM/PR26163.ll?rev=322543&r1=322542&r2=322543&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/ARM/PR26163.ll (original)
+++ llvm/trunk/test/DebugInfo/ARM/PR26163.ll Tue Jan 16 03:17:57 2018
@@ -9,8 +9,8 @@
 ; CHECK: DW_TAG_inlined_subroutine
 ; CHECK: DW_TAG_variable
 ; CHECK:   DW_AT_location [DW_FORM_sec_offset] ({{.*}}
-; CHECK:      0x0000000000000004 - 0x0000000000000004: DW_OP_constu 0x0, DW_OP_stack_value, DW_OP_piece 0x8
-; CHECK:      0x0000000000000004 - 0x0000000000000014: DW_OP_constu 0x0, DW_OP_stack_value, DW_OP_piece 0x4)
+; CHECK:      [0x00000004, 0x00000004): DW_OP_constu 0x0, DW_OP_stack_value, DW_OP_piece 0x8
+; CHECK:      [0x00000004, 0x00000014): DW_OP_constu 0x0, DW_OP_stack_value, DW_OP_piece 0x4)
 
 ; Created form the following test case (PR26163) with
 ; clang -cc1 -triple armv4t--freebsd11.0-gnueabi -emit-obj -debug-info-kind=standalone -O2 -x c test.c
@@ -20,26 +20,26 @@
 ; 	long long tv_sec;
 ; 	int tv_usec;
 ; };
-; 
+;
 ; void *memset(void *, int, size_t);
 ; void foo(void);
-; 
+;
 ; static void
 ; bar(int value)
 ; {
 ; 	struct timeval lifetime;
-; 
+;
 ; 	memset(&lifetime, 0, sizeof(struct timeval));
 ; 	lifetime.tv_sec = value;
-; 
+;
 ; 	foo();
 ; }
-; 
+;
 ; int
 ; parse_config_file(void)
 ; {
 ; 	int value;
-; 
+;
 ; 	bar(value);
 ; 	return (0);
 ; }

Modified: llvm/trunk/test/DebugInfo/ARM/partial-subreg.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/ARM/partial-subreg.ll?rev=322543&r1=322542&r2=322543&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/ARM/partial-subreg.ll (original)
+++ llvm/trunk/test/DebugInfo/ARM/partial-subreg.ll Tue Jan 16 03:17:57 2018
@@ -9,7 +9,7 @@
 ; CHECK:   DW_AT_name {{.*}}"subscript.get"
 ; CHECK:  DW_TAG_formal_parameter
 ; CHECK-NEXT: DW_AT_location [DW_FORM_sec_offset]	({{.*}}
-; CHECK-NEXT:  0x{{.*}} - 0x{{.*}}: DW_OP_regx D16, DW_OP_piece 0x8, DW_OP_regx D17, DW_OP_piece 0x4, DW_OP_regx D16, DW_OP_piece 0x8, DW_OP_regx D17, DW_OP_piece 0x4
+; CHECK-NEXT:  [0x{{.*}}, 0x{{.*}}): DW_OP_regx D16, DW_OP_piece 0x8, DW_OP_regx D17, DW_OP_piece 0x4, DW_OP_regx D16, DW_OP_piece 0x8, DW_OP_regx D17, DW_OP_piece 0x4
 
 source_filename = "simd.ll"
 target datalayout = "e-m:o-p:32:32-f64:32:64-v64:32:64-v128:32:128-a:0:32-n32-S32"

Modified: llvm/trunk/test/DebugInfo/MIR/AArch64/clobber-sp.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/MIR/AArch64/clobber-sp.mir?rev=322543&r1=322542&r2=322543&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/MIR/AArch64/clobber-sp.mir (original)
+++ llvm/trunk/test/DebugInfo/MIR/AArch64/clobber-sp.mir Tue Jan 16 03:17:57 2018
@@ -4,8 +4,8 @@
 # CHECK: DW_TAG_formal_parameter
 # CHECK: DW_TAG_formal_parameter
 # CHECK-NEXT: DW_AT_location
-# CHECK-NEXT:   0x0000000000000000 - 0x0000000000000014: DW_OP_reg1 W1
-# CHECK-NEXT:   0x0000000000000014 - 0x0000000000000038: DW_OP_breg31 WSP+8
+# CHECK-NEXT:   [0x0000000000000000, 0x0000000000000014): DW_OP_reg1 W1
+# CHECK-NEXT:   [0x0000000000000014, 0x0000000000000038): DW_OP_breg31 WSP+8
 # CHECK-NEXT: DW_AT_name {{.*}}"y"
 
 --- |
@@ -24,9 +24,9 @@
   source_filename = "/tmp/clobber.c"
   target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
   target triple = "arm64-apple-ios"
-  
+
   %struct.Rect = type { double, double, double, double }
-  
+
   ; Function Attrs: nounwind optsize ssp
   define i32 @f(i32 %x, i32 %y, [4 x double] %s.coerce) local_unnamed_addr #0 !dbg !7 {
   entry:
@@ -38,32 +38,32 @@
     tail call void @g([4 x double] %s.coerce) #4, !dbg !30
     %tobool = icmp eq i32 %y, 0, !dbg !31
     br i1 %tobool, label %if.end, label %if.then, !dbg !33
-  
+
   if.then:                                          ; preds = %entry
     tail call void @llvm.dbg.value(metadata i32* %x.addr, i64 0, metadata !19, metadata !22), !dbg !23
     call void @h(i32* nonnull %x.addr) #4, !dbg !34
     br label %if.end, !dbg !34
-  
+
   if.end:                                           ; preds = %if.then, %entry
     ret i32 0, !dbg !35
   }
-  
+
   declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
   declare void @g([4 x double]) local_unnamed_addr #2
   declare void @h(i32*) local_unnamed_addr #2
   declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #1
   declare void @llvm.stackprotector(i8*, i8**) #3
-  
+
   attributes #0 = { nounwind optsize ssp }
   attributes #1 = { nounwind readnone speculatable }
   attributes #2 = { optsize }
   attributes #3 = { nounwind }
   attributes #4 = { nounwind optsize }
-  
+
   !llvm.dbg.cu = !{!0}
   !llvm.module.flags = !{!3, !4, !5}
   !llvm.ident = !{!6}
-  
+
   !0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "clang version 5.0.0 (trunk 302682) (llvm/trunk 302683)", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug, enums: !2)
   !1 = !DIFile(filename: "/tmp/clobber.c", directory: "/Volumes/Data/apple-internal/swift")
   !2 = !{}
@@ -111,14 +111,14 @@ legalized:       false
 regBankSelected: false
 selected:        false
 tracksRegLiveness: true
-liveins:         
+liveins:
   - { reg: '%w0' }
   - { reg: '%w1' }
   - { reg: '%d0' }
   - { reg: '%d1' }
   - { reg: '%d2' }
   - { reg: '%d3' }
-frameInfo:       
+frameInfo:
   isFrameAddressTaken: false
   isReturnAddressTaken: false
   hasStackMap:     false
@@ -132,7 +132,7 @@ frameInfo:
   hasOpaqueSPAdjustment: false
   hasVAStart:      false
   hasMustTailInVarArgFunc: false
-stack:           
+stack:
   - { id: 0, name: x.addr, offset: -20, size: 4, alignment: 4, local-offset: -4 }
   - { id: 1, type: spill-slot, offset: -24, size: 4, alignment: 4 }
   - { id: 2, type: spill-slot, offset: -8, size: 8, alignment: 8, callee-saved-register: '%lr' }
@@ -141,7 +141,7 @@ body:             |
   bb.0.entry:
     successors: %bb.2.if.end(0x40000000), %bb.1.if.then(0x40000000)
     liveins: %w0, %w1, %d0, %d1, %d2, %d3, %lr
-  
+
     %sp = frame-setup SUBXri %sp, 32, 0
     frame-setup STPXi killed %fp, killed %lr, %sp, 2 :: (store 8 into %stack.3), (store 8 into %stack.2)
     %fp = frame-setup ADDXri %sp, 16, 0
@@ -153,15 +153,15 @@ body:             |
     BL @g, csr_aarch64_aapcs, implicit-def dead %lr, implicit %sp, implicit killed %d0, implicit killed %d1, implicit killed %d2, implicit killed %d3, implicit-def %sp, debug-location !30
     %w0 = LDRWui %sp, 2, debug-location !33 :: (load 4 from %stack.1)
     CBZW killed %w0, %bb.2.if.end, debug-location !33
-  
+
   bb.1.if.then:
     successors: %bb.2.if.end(0x80000000)
-  
+
     DBG_VALUE debug-use %sp, 0, !20, !36, debug-location !28
     %x0 = SUBXri %fp, 4, 0
     DBG_VALUE debug-use %x0, debug-use _, !19, !22, debug-location !23
     BL @h, csr_aarch64_aapcs, implicit-def dead %lr, implicit %sp, implicit killed %x0, debug-location !34
-  
+
   bb.2.if.end:
     DBG_VALUE debug-use %sp, 0, !20, !36, debug-location !28
     %w8 = MOVZWi 0, 0

Modified: llvm/trunk/test/DebugInfo/MIR/ARM/split-superreg-piece.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/MIR/ARM/split-superreg-piece.mir?rev=322543&r1=322542&r2=322543&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/MIR/ARM/split-superreg-piece.mir (original)
+++ llvm/trunk/test/DebugInfo/MIR/ARM/split-superreg-piece.mir Tue Jan 16 03:17:57 2018
@@ -3,7 +3,7 @@
 # CHECK: .debug_info contents:
 # CHECK: DW_TAG_variable
 # CHECK-NEXT: DW_AT_location
-# CHECK-NEXT: 0x0000000000000010 - 0x0000000000000018: DW_OP_piece 0x10, DW_OP_regx D0, DW_OP_piece 0x8, DW_OP_regx D1, DW_OP_piece 0x8)
+# CHECK-NEXT: [0x00000010, 0x00000018): DW_OP_piece 0x10, DW_OP_regx D0, DW_OP_piece 0x8, DW_OP_regx D1, DW_OP_piece 0x8)
 # CHECK-NEXT: DW_AT_name {{.*}}"vec"
 
 --- |
@@ -17,7 +17,7 @@
 
   target datalayout = "e-m:o-p:32:32-f64:32:64-v64:32:64-v128:32:128-a:0:32-n32-S32"
   target triple = "thumbv7s-apple-ios5.0.0"
-  
+
   define float @f() local_unnamed_addr #0 !dbg !9 {
   entry:
     %call = tail call <4 x float> bitcast (<4 x float> (...)* @v to <4 x float> ()*)() #0, !dbg !19
@@ -27,17 +27,17 @@
     %add = fadd float %vecext, %vecext1, !dbg !24
     ret float %add, !dbg !25
   }
-  
+
   declare arm_aapcs_vfpcc <4 x float> @v(...) local_unnamed_addr #0
-  
+
   declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #0
-  
+
   attributes #0 = { nounwind readnone }
-  
+
   !llvm.dbg.cu = !{!0}
   !llvm.module.flags = !{!3, !4, !5, !6, !7}
   !llvm.ident = !{!8}
-  
+
   !0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "clang version 4.0.0 (trunk 286322) (llvm/trunk 286305)", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug, enums: !2)
   !1 = !DIFile(filename: "v.c", directory: "/")
   !2 = !{}
@@ -74,20 +74,20 @@ legalized:       false
 regBankSelected: false
 selected:        false
 tracksRegLiveness: true
-calleeSavedRegisters: [ '%lr', '%d8', '%d9', '%d10', '%d11', '%d12', '%d13', 
-                        '%d14', '%d15', '%q4', '%q5', '%q6', '%q7', '%r4', 
-                        '%r5', '%r6', '%r7', '%r8', '%r10', '%r11', '%s16', 
-                        '%s17', '%s18', '%s19', '%s20', '%s21', '%s22', 
-                        '%s23', '%s24', '%s25', '%s26', '%s27', '%s28', 
-                        '%s29', '%s30', '%s31', '%d8_d10', '%d9_d11', '%d10_d12', 
-                        '%d11_d13', '%d12_d14', '%d13_d15', '%q4_q5', '%q5_q6', 
-                        '%q6_q7', '%q4_q5_q6_q7', '%r4_r5', '%r6_r7', '%r10_r11', 
-                        '%d8_d9_d10', '%d9_d10_d11', '%d10_d11_d12', '%d11_d12_d13', 
-                        '%d12_d13_d14', '%d13_d14_d15', '%d8_d10_d12', 
-                        '%d9_d11_d13', '%d10_d12_d14', '%d11_d13_d15', 
-                        '%d8_d10_d12_d14', '%d9_d11_d13_d15', '%d9_d10', 
+calleeSavedRegisters: [ '%lr', '%d8', '%d9', '%d10', '%d11', '%d12', '%d13',
+                        '%d14', '%d15', '%q4', '%q5', '%q6', '%q7', '%r4',
+                        '%r5', '%r6', '%r7', '%r8', '%r10', '%r11', '%s16',
+                        '%s17', '%s18', '%s19', '%s20', '%s21', '%s22',
+                        '%s23', '%s24', '%s25', '%s26', '%s27', '%s28',
+                        '%s29', '%s30', '%s31', '%d8_d10', '%d9_d11', '%d10_d12',
+                        '%d11_d13', '%d12_d14', '%d13_d15', '%q4_q5', '%q5_q6',
+                        '%q6_q7', '%q4_q5_q6_q7', '%r4_r5', '%r6_r7', '%r10_r11',
+                        '%d8_d9_d10', '%d9_d10_d11', '%d10_d11_d12', '%d11_d12_d13',
+                        '%d12_d13_d14', '%d13_d14_d15', '%d8_d10_d12',
+                        '%d9_d11_d13', '%d10_d12_d14', '%d11_d13_d15',
+                        '%d8_d10_d12_d14', '%d9_d11_d13_d15', '%d9_d10',
                         '%d11_d12', '%d13_d14', '%d9_d10_d11_d12', '%d11_d12_d13_d14' ]
-frameInfo:       
+frameInfo:
   isFrameAddressTaken: false
   isReturnAddressTaken: false
   hasStackMap:     false
@@ -101,12 +101,12 @@ frameInfo:
   hasOpaqueSPAdjustment: false
   hasVAStart:      false
   hasMustTailInVarArgFunc: false
-stack:           
+stack:
   - { id: 0, type: spill-slot, offset: -4, size: 4, alignment: 4, callee-saved-register: '%lr' }
 body:             |
   bb.0.entry:
     liveins: %lr
-  
+
     early-clobber %sp = frame-setup t2STR_PRE killed undef %lr, %sp, -4, 14, _
     frame-setup CFI_INSTRUCTION def_cfa_offset 4
     frame-setup CFI_INSTRUCTION offset %lr, -4

Modified: llvm/trunk/test/DebugInfo/MIR/ARM/split-superreg.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/MIR/ARM/split-superreg.mir?rev=322543&r1=322542&r2=322543&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/MIR/ARM/split-superreg.mir (original)
+++ llvm/trunk/test/DebugInfo/MIR/ARM/split-superreg.mir Tue Jan 16 03:17:57 2018
@@ -3,7 +3,7 @@
 # CHECK: .debug_info contents:
 # CHECK: DW_TAG_variable
 # CHECK-NEXT: DW_AT_location
-# CHECK-NEXT: 0x0000000000000010 - 0x0000000000000018: DW_OP_regx D0, DW_OP_piece 0x8, DW_OP_regx D1, DW_OP_piece 0x8)
+# CHECK-NEXT: [0x00000010, 0x00000018): DW_OP_regx D0, DW_OP_piece 0x8, DW_OP_regx D1, DW_OP_piece 0x8)
 # CHECK-NEXT: DW_AT_name {{.*}}"vec"
 
 --- |
@@ -17,7 +17,7 @@
 
   target datalayout = "e-m:o-p:32:32-f64:32:64-v64:32:64-v128:32:128-a:0:32-n32-S32"
   target triple = "thumbv7s-apple-ios5.0.0"
-  
+
   define float @f() local_unnamed_addr #0 !dbg !9 {
   entry:
     %call = tail call <4 x float> bitcast (<4 x float> (...)* @v to <4 x float> ()*)() #0, !dbg !19
@@ -27,17 +27,17 @@
     %add = fadd float %vecext, %vecext1, !dbg !24
     ret float %add, !dbg !25
   }
-  
+
   declare arm_aapcs_vfpcc <4 x float> @v(...) local_unnamed_addr #0
-  
+
   declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #0
-  
+
   attributes #0 = { nounwind readnone }
-  
+
   !llvm.dbg.cu = !{!0}
   !llvm.module.flags = !{!3, !4, !5, !6, !7}
   !llvm.ident = !{!8}
-  
+
   !0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "clang version 4.0.0 (trunk 286322) (llvm/trunk 286305)", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug, enums: !2)
   !1 = !DIFile(filename: "v.c", directory: "/")
   !2 = !{}
@@ -74,20 +74,20 @@ legalized:       false
 regBankSelected: false
 selected:        false
 tracksRegLiveness: true
-calleeSavedRegisters: [ '%lr', '%d8', '%d9', '%d10', '%d11', '%d12', '%d13', 
-                        '%d14', '%d15', '%q4', '%q5', '%q6', '%q7', '%r4', 
-                        '%r5', '%r6', '%r7', '%r8', '%r10', '%r11', '%s16', 
-                        '%s17', '%s18', '%s19', '%s20', '%s21', '%s22', 
-                        '%s23', '%s24', '%s25', '%s26', '%s27', '%s28', 
-                        '%s29', '%s30', '%s31', '%d8_d10', '%d9_d11', '%d10_d12', 
-                        '%d11_d13', '%d12_d14', '%d13_d15', '%q4_q5', '%q5_q6', 
-                        '%q6_q7', '%q4_q5_q6_q7', '%r4_r5', '%r6_r7', '%r10_r11', 
-                        '%d8_d9_d10', '%d9_d10_d11', '%d10_d11_d12', '%d11_d12_d13', 
-                        '%d12_d13_d14', '%d13_d14_d15', '%d8_d10_d12', 
-                        '%d9_d11_d13', '%d10_d12_d14', '%d11_d13_d15', 
-                        '%d8_d10_d12_d14', '%d9_d11_d13_d15', '%d9_d10', 
+calleeSavedRegisters: [ '%lr', '%d8', '%d9', '%d10', '%d11', '%d12', '%d13',
+                        '%d14', '%d15', '%q4', '%q5', '%q6', '%q7', '%r4',
+                        '%r5', '%r6', '%r7', '%r8', '%r10', '%r11', '%s16',
+                        '%s17', '%s18', '%s19', '%s20', '%s21', '%s22',
+                        '%s23', '%s24', '%s25', '%s26', '%s27', '%s28',
+                        '%s29', '%s30', '%s31', '%d8_d10', '%d9_d11', '%d10_d12',
+                        '%d11_d13', '%d12_d14', '%d13_d15', '%q4_q5', '%q5_q6',
+                        '%q6_q7', '%q4_q5_q6_q7', '%r4_r5', '%r6_r7', '%r10_r11',
+                        '%d8_d9_d10', '%d9_d10_d11', '%d10_d11_d12', '%d11_d12_d13',
+                        '%d12_d13_d14', '%d13_d14_d15', '%d8_d10_d12',
+                        '%d9_d11_d13', '%d10_d12_d14', '%d11_d13_d15',
+                        '%d8_d10_d12_d14', '%d9_d11_d13_d15', '%d9_d10',
                         '%d11_d12', '%d13_d14', '%d9_d10_d11_d12', '%d11_d12_d13_d14' ]
-frameInfo:       
+frameInfo:
   isFrameAddressTaken: false
   isReturnAddressTaken: false
   hasStackMap:     false
@@ -101,12 +101,12 @@ frameInfo:
   hasOpaqueSPAdjustment: false
   hasVAStart:      false
   hasMustTailInVarArgFunc: false
-stack:           
+stack:
   - { id: 0, type: spill-slot, offset: -4, size: 4, alignment: 4, callee-saved-register: '%lr' }
 body:             |
   bb.0.entry:
     liveins: %lr
-  
+
     early-clobber %sp = frame-setup t2STR_PRE killed undef %lr, %sp, -4, 14, _
     frame-setup CFI_INSTRUCTION def_cfa_offset 4
     frame-setup CFI_INSTRUCTION offset %lr, -4

Modified: llvm/trunk/test/DebugInfo/Mips/dsr-fixed-objects.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/Mips/dsr-fixed-objects.ll?rev=322543&r1=322542&r2=322543&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/Mips/dsr-fixed-objects.ll (original)
+++ llvm/trunk/test/DebugInfo/Mips/dsr-fixed-objects.ll Tue Jan 16 03:17:57 2018
@@ -23,8 +23,8 @@ declare void @foo(i32*)
 ; CHECK: DW_AT_name {{.*}}"e"
 ; CHECK: DW_TAG_variable
 ; CHECK-NEXT: DW_AT_location [DW_FORM_sec_offset] (
-; CHECK-NEXT:   0x0000000000000028 - 0x000000000000002c: DW_OP_reg1 AT_64
-; CHECK-NEXT:   0x000000000000002c - 0x0000000000000048: DW_OP_breg29 SP_64+16, DW_OP_deref)
+; CHECK-NEXT:   [0x00000028, 0x0000002c): DW_OP_reg1 AT_64
+; CHECK-NEXT:   [0x0000002c, 0x00000048): DW_OP_breg29 SP_64+16, DW_OP_deref)
 ; CHECK-NEXT: DW_AT_name [DW_FORM_strp]     ( .debug_str[0x0000006b] = "x")
 
 define i32 @f0(i32 signext %a, i32 signext %b, i32 signext %c, i32 signext %d, i32 signext %e) !dbg !4 {
@@ -54,8 +54,8 @@ entry:
 
 ; CHECK: DW_TAG_variable
 ; CHECK-NEXT: DW_AT_location [DW_FORM_sec_offset]  (
-; CHECK-NEXT:   0x0000000000000080 - 0x0000000000000084: DW_OP_reg1 AT_64
-; CHECK-NEXT:   0x0000000000000084 - 0x0000000000000098: DW_OP_breg29 SP_64+16, DW_OP_deref)
+; CHECK-NEXT:   [0x00000080, 0x00000084): DW_OP_reg1 AT_64
+; CHECK-NEXT:   [0x00000084, 0x00000098): DW_OP_breg29 SP_64+16, DW_OP_deref)
 ; CHECK-NEXT: DW_AT_name [DW_FORM_strp]     ( .debug_str[0x0000006b] = "x")
 
 define i32 @f1(i32 signext %a, i32 signext %b, i32 signext %c, i32 signext %d, i32 signext %e) !dbg !15 {

Modified: llvm/trunk/test/DebugInfo/Sparc/subreg.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/Sparc/subreg.ll?rev=322543&r1=322542&r2=322543&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/Sparc/subreg.ll (original)
+++ llvm/trunk/test/DebugInfo/Sparc/subreg.ll Tue Jan 16 03:17:57 2018
@@ -1,6 +1,6 @@
 ; RUN: llc -filetype=obj -O0 < %s -mtriple sparc64-unknown-linux-gnu | llvm-dwarfdump - --debug-loc | FileCheck %s
 ; The undescribable 128-bit register should be split into two 64-bit registers.
-; CHECK: {{.*}} - {{.*}}: DW_OP_regx D0, DW_OP_piece 0x8, DW_OP_regx D1, DW_OP_piece 0x8
+; CHECK: [{{.*}}, {{.*}}): DW_OP_regx D0, DW_OP_piece 0x8, DW_OP_regx D1, DW_OP_piece 0x8
 
 target datalayout = "E-m:e-i64:64-n32:64-S128"
 target triple = "sparc64"

Modified: llvm/trunk/test/DebugInfo/X86/DW_AT_location-reference.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/X86/DW_AT_location-reference.ll?rev=322543&r1=322542&r2=322543&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/X86/DW_AT_location-reference.ll (original)
+++ llvm/trunk/test/DebugInfo/X86/DW_AT_location-reference.ll Tue Jan 16 03:17:57 2018
@@ -16,7 +16,7 @@
 ; // This ref is not relocatable on Darwin, and is relocatable elsewhere.
 ; extern int g(int, int);
 ; extern int a;
-; 
+;
 ; void f(void) {
 ;   int x;
 ;   a = g(0, 0);
@@ -34,10 +34,10 @@
 ; CHECK-NEXT:   DW_AT_location [DW_FORM_sec_offset] (0x00000000
 ; Check that the location contains only 4 ranges - this verifies that the 4th
 ; and 5th ranges were successfully merged into a single range.
-; CHECK-NEXT:   0x{{[0-9a-f]*}} - 0x{{[0-9a-f]*}}:
-; CHECK-NEXT:   0x{{[0-9a-f]*}} - 0x{{[0-9a-f]*}}:
-; CHECK-NEXT:   0x{{[0-9a-f]*}} - 0x{{[0-9a-f]*}}:
-; CHECK-NEXT:   0x{{[0-9a-f]*}} - 0x{{[0-9a-f]*}}: {{.*}})
+; CHECK-NEXT:   [0x{{[0-9a-f]*}}, 0x{{[0-9a-f]*}}):
+; CHECK-NEXT:   [0x{{[0-9a-f]*}}, 0x{{[0-9a-f]*}}):
+; CHECK-NEXT:   [0x{{[0-9a-f]*}}, 0x{{[0-9a-f]*}}):
+; CHECK-NEXT:   [0x{{[0-9a-f]*}}, 0x{{[0-9a-f]*}}): {{.*}})
 ; CHECK-NEXT:   DW_AT_name {{.*}} "x"
 ; CHECK-NEXT:   DW_AT_decl_file
 ; CHECK-NEXT:   DW_AT_decl_line

Modified: llvm/trunk/test/DebugInfo/X86/PR26148.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/X86/PR26148.ll?rev=322543&r1=322542&r2=322543&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/X86/PR26148.ll (original)
+++ llvm/trunk/test/DebugInfo/X86/PR26148.ll Tue Jan 16 03:17:57 2018
@@ -10,7 +10,7 @@
 ;  b.f3 = p1;
 ;  a = b = c;
 ; }
-; 
+;
 ; int main() { return 0; }
 ;
 ; This is similar to the bug in test/DebugInfo/ARM/PR26163.ll, except that there is an
@@ -19,8 +19,8 @@
 ; AS in 26163, we expect two ranges (as opposed to one), the first one being zero sized
 ;
 ;
-; CHECK: 0x0000000000000004 - 0x0000000000000004: DW_OP_constu 0x3, DW_OP_piece 0x4, DW_OP_reg5 RDI, DW_OP_piece 0x2
-; CHECK: 0x0000000000000004 - 0x0000000000000014: DW_OP_constu 0x3, DW_OP_piece 0x4, DW_OP_constu 0x0, DW_OP_piece 0x4
+; CHECK: [0x0000000000000004, 0x0000000000000004): DW_OP_constu 0x3, DW_OP_piece 0x4, DW_OP_reg5 RDI, DW_OP_piece 0x2
+; CHECK: [0x0000000000000004, 0x0000000000000014): DW_OP_constu 0x3, DW_OP_piece 0x4, DW_OP_constu 0x0, DW_OP_piece 0x4
 
 source_filename = "test/DebugInfo/X86/PR26148.ll"
 target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"

Modified: llvm/trunk/test/DebugInfo/X86/constant-loclist.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/X86/constant-loclist.ll?rev=322543&r1=322542&r2=322543&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/X86/constant-loclist.ll (original)
+++ llvm/trunk/test/DebugInfo/X86/constant-loclist.ll Tue Jan 16 03:17:57 2018
@@ -5,17 +5,17 @@
 ; CHECK: .debug_info contents:
 ; CHECK: DW_TAG_variable
 ; CHECK-NEXT: DW_AT_location [DW_FORM_data4]	(
-; CHECK-NEXT:   0x{{.*}} - 0x{{.*}}: DW_OP_constu 0x4000000000000000)
+; CHECK-NEXT:   [0x{{.*}}, 0x{{.*}}): DW_OP_constu 0x4000000000000000)
 ; CHECK-NEXT: DW_AT_name {{.*}}"d"
 ; CHECK: DW_TAG_variable
 ; CHECK-NEXT: DW_AT_location [DW_FORM_data4]	(
-; CHECK-NEXT:   0x{{.*}} - 0x{{.*}}: DW_OP_consts +0
-; CHECK-NEXT:   0x{{.*}} - 0x{{.*}}: DW_OP_consts +4611686018427387904)
+; CHECK-NEXT:   [0x{{.*}}, 0x{{.*}}): DW_OP_consts +0
+; CHECK-NEXT:   [0x{{.*}}, 0x{{.*}}): DW_OP_consts +4611686018427387904)
 ; CHECK-NEXT: DW_AT_name {{.*}}"i"
 ; CHECK: DW_TAG_variable
 ; CHECK-NEXT: DW_AT_location [DW_FORM_data4]	(
-; CHECK-NEXT:   0x{{.*}} - 0x{{.*}}: DW_OP_constu 0x0
-; CHECK-NEXT:   0x{{.*}} - 0x{{.*}}: DW_OP_constu 0x4000000000000000)
+; CHECK-NEXT:   [0x{{.*}}, 0x{{.*}}): DW_OP_constu 0x0
+; CHECK-NEXT:   [0x{{.*}}, 0x{{.*}}): DW_OP_constu 0x4000000000000000)
 ; CHECK-NEXT: DW_AT_name {{.*}}"u"
 
 source_filename = "test.c"

Modified: llvm/trunk/test/DebugInfo/X86/dbg-addr.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/X86/dbg-addr.ll?rev=322543&r1=322542&r2=322543&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/X86/dbg-addr.ll (original)
+++ llvm/trunk/test/DebugInfo/X86/dbg-addr.ll Tue Jan 16 03:17:57 2018
@@ -14,7 +14,7 @@
 
 ; DWARF: DW_TAG_variable
 ; DWARF-NEXT:              DW_AT_location (0x00000000
-; DWARF-NEXT:                          0x{{.*}} - 0x{{.*}}: DW_OP_breg7 RSP+0)
+; DWARF-NEXT:                          [0x{{.*}}, 0x{{.*}}): DW_OP_breg7 RSP+0)
 ; DWARF-NEXT:              DW_AT_name ("o")
 
 

Modified: llvm/trunk/test/DebugInfo/X86/dbg-declare-arg.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/X86/dbg-declare-arg.ll?rev=322543&r1=322542&r2=322543&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/X86/dbg-declare-arg.ll (original)
+++ llvm/trunk/test/DebugInfo/X86/dbg-declare-arg.ll Tue Jan 16 03:17:57 2018
@@ -6,7 +6,7 @@ target triple = "x86_64-apple-macosx10.6
 
 ; C++ source:
 ; class A { public: int x; int y; int z; int o; ~A() { x = 1; }};
-; 
+;
 ; A foo(int i) {
 ;   int j = 0;
 ;   if (i == 42) {
@@ -18,9 +18,9 @@ target triple = "x86_64-apple-macosx10.6
 ; }
 
 ; CHECK: DW_AT_name {{.*}}"j"
-; CHECK: DW_TAG_variable  
+; CHECK: DW_TAG_variable
 ; CHECK-NEXT:   DW_AT_location [DW_FORM_sec_offset] (
-; CHECK-NEXT:     0x{{.*}} - 0x{{.*}}: DW_OP_breg7 RSP+8, DW_OP_deref)
+; CHECK-NEXT:     [0x{{.*}}, 0x{{.*}}): DW_OP_breg7 RSP+8, DW_OP_deref)
 ; CHECK-NEXT:   DW_AT_name {{.*}}"my_a"
 
 %class.A = type { i32, i32, i32, i32 }

Modified: llvm/trunk/test/DebugInfo/X86/dbg-value-const-byref.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/X86/dbg-value-const-byref.ll?rev=322543&r1=322542&r2=322543&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/X86/dbg-value-const-byref.ll (original)
+++ llvm/trunk/test/DebugInfo/X86/dbg-value-const-byref.ll Tue Jan 16 03:17:57 2018
@@ -22,10 +22,10 @@
 ; CHECK: DW_TAG_variable
 ; CHECK-NOT: DW_TAG
 ; CHECK:     DW_AT_location {{.*}}({{.*}}
-; CHECK-NEXT:  0x{{0*.*}} - [[C1:0x.*]]: DW_OP_consts +3
-; CHECK-NEXT:      [[C1]] - [[C2:0x.*]]: DW_OP_consts +7
-; CHECK-NEXT:      [[C2]] - [[R1:0x.*]]: DW_OP_reg0 RAX
-; CHECK-NEXT:      [[R1]] - [[R2:0x.*]]: DW_OP_breg7 RSP+4, DW_OP_deref)
+; CHECK-NEXT:  [0x{{0*.*}}, 0x[[C1:.*]]): DW_OP_consts +3
+; CHECK-NEXT:      [0x[[C1]], 0x[[C2:.*]]): DW_OP_consts +7
+; CHECK-NEXT:      [0x[[C2]], 0x[[R1:.*]]): DW_OP_reg0 RAX
+; CHECK-NEXT:      [0x[[R1]], 0x[[R2:.*]]): DW_OP_breg7 RSP+4, DW_OP_deref)
 ; CHECK-NOT: DW_TAG
 ; CHECK: DW_AT_name{{.*}}"i"
 

Modified: llvm/trunk/test/DebugInfo/X86/dbg-value-frame-index.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/X86/dbg-value-frame-index.ll?rev=322543&r1=322542&r2=322543&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/X86/dbg-value-frame-index.ll (original)
+++ llvm/trunk/test/DebugInfo/X86/dbg-value-frame-index.ll Tue Jan 16 03:17:57 2018
@@ -22,7 +22,7 @@ while.end:
 ; CHECK-LABEL: test
 ; CHECK:       #DEBUG_VALUE: test:w <- [DW_OP_plus_uconst 8] [%rsp+0]
 ; DWARF:  DW_AT_location [DW_FORM_sec_offset] (
-; DWARF-NEXT:   {{.*}} - {{.*}}: DW_OP_breg7 RSP+8)
+; DWARF-NEXT:   [{{.*}}, {{.*}}): DW_OP_breg7 RSP+8)
 
 declare i1 @fn(i64*, i64*, i64*, i8*, i64, i64*, i32*, i8*)
 declare void @llvm.dbg.value(metadata, metadata, metadata)

Modified: llvm/trunk/test/DebugInfo/X86/dbg-value-regmask-clobber.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/X86/dbg-value-regmask-clobber.ll?rev=322543&r1=322542&r2=322543&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/X86/dbg-value-regmask-clobber.ll (original)
+++ llvm/trunk/test/DebugInfo/X86/dbg-value-regmask-clobber.ll Tue Jan 16 03:17:57 2018
@@ -23,7 +23,7 @@
 ; DWARF: .debug_info contents:
 ; DWARF:  DW_TAG_formal_parameter
 ; DWARF-NEXT:    DW_AT_location [DW_FORM_sec_offset]   ({{0x.*}}
-; DWARF-NEXT:      0x0000000000000000 - 0x0000000000000013: DW_OP_reg2 RCX)
+; DWARF-NEXT:      [0x0000000000000000, 0x0000000000000013): DW_OP_reg2 RCX)
 ; DWARF-NEXT:    DW_AT_name [DW_FORM_strp]     {{.*}} "argc"
 
 ; ModuleID = 't.cpp'

Modified: llvm/trunk/test/DebugInfo/X86/debug-loc-asan.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/X86/debug-loc-asan.ll?rev=322543&r1=322542&r2=322543&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/X86/debug-loc-asan.ll (original)
+++ llvm/trunk/test/DebugInfo/X86/debug-loc-asan.ll Tue Jan 16 03:17:57 2018
@@ -32,7 +32,7 @@
 ; CHECK: DW_OP_breg5
 ; DWARF:       DW_TAG_formal_parameter
 ; DWARF:         DW_AT_location
-; DWARF-NEXT:      {{.*}} - {{.*}}: DW_OP_breg5 RDI+0, DW_OP_deref
+; DWARF-NEXT:      [{{.*}}, {{.*}}): DW_OP_breg5 RDI+0, DW_OP_deref
 
 ; Then it's addressed via %rsp:
 ; CHECK:      .quad [[START_LABEL]]-.Lfunc_begin0
@@ -40,7 +40,7 @@
 ; CHECK: DW_OP_breg7
 ; CHECK-NEXT: [[OFFSET]]
 ; CHECK: DW_OP_deref
-; DWARF-NEXT:      {{.*}} - {{.*}}: DW_OP_breg7 RSP+{{[0-9]+}}, DW_OP_deref, DW_OP_deref)
+; DWARF-NEXT:      [{{.*}}, {{.*}}): DW_OP_breg7 RSP+{{[0-9]+}}, DW_OP_deref, DW_OP_deref)
 
 ; ModuleID = 'test.cc'
 target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"

Modified: llvm/trunk/test/DebugInfo/X86/debug-loc-frame.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/X86/debug-loc-frame.ll?rev=322543&r1=322542&r2=322543&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/X86/debug-loc-frame.ll (original)
+++ llvm/trunk/test/DebugInfo/X86/debug-loc-frame.ll Tue Jan 16 03:17:57 2018
@@ -27,8 +27,8 @@
 ; CHECK-NOT:  NULL
 ; CHECK:      DW_TAG_variable
 ; CHECK:      DW_AT_location [DW_FORM_sec_offset] ({{.*}}
-; CHECK-NEXT:   {{0x.*}} - {{0x.*}}: DW_OP_reg0 RAX
-; CHECK-NEXT:   {{0x.*}} - {{0x.*}}: DW_OP_breg7 RSP+4, DW_OP_deref)
+; CHECK-NEXT:   [{{0x.*}}, {{0x.*}}): DW_OP_reg0 RAX
+; CHECK-NEXT:   [{{0x.*}}, {{0x.*}}): DW_OP_breg7 RSP+4, DW_OP_deref)
 ; CHECK-NEXT: DW_AT_name {{.*}}"val"
 
 ; ModuleID = 'frame.c'

Modified: llvm/trunk/test/DebugInfo/X86/debug-loc-offset.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/X86/debug-loc-offset.ll?rev=322543&r1=322542&r2=322543&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/X86/debug-loc-offset.ll (original)
+++ llvm/trunk/test/DebugInfo/X86/debug-loc-offset.ll Tue Jan 16 03:17:57 2018
@@ -43,8 +43,8 @@
 ; CHECK: DW_TAG_formal_parameter
 ; CHECK-NOT: DW_TAG
 ; CHECK:       DW_AT_location [DW_FORM_sec_offset]   ({{.*}}
-; CHECK-NEXT:    0x0000000000000000 - 0x0000000000000017: DW_OP_breg0 EAX+0, DW_OP_deref
-; CHECK-NEXT:    0x0000000000000017 - 0x0000000000000043: DW_OP_breg5 EBP-8, DW_OP_deref, DW_OP_deref
+; CHECK-NEXT:    [0x00000000, 0x00000017): DW_OP_breg0 EAX+0, DW_OP_deref
+; CHECK-NEXT:    [0x00000017, 0x00000043): DW_OP_breg5 EBP-8, DW_OP_deref, DW_OP_deref
 ; CHECK-NEXT:  DW_AT_name [DW_FORM_strp]{{.*}}"a"
 
 ; CHECK: DW_TAG_variable
@@ -62,17 +62,17 @@
 ; CHECK: DW_TAG_formal_parameter
 ; CHECK-NOT: DW_TAG
 ; CHECK:       DW_AT_location [DW_FORM_sec_offset]   ({{.*}}
-; CHECK-NEXT:    0x0000000000000000 - 0x000000000000000a: DW_OP_consts +0, DW_OP_stack_value
-; CHECK-NEXT:    0x000000000000000a - 0x0000000000000017: DW_OP_consts +1, DW_OP_stack_value)
+; CHECK-NEXT:    [0x00000000, 0x0000000a): DW_OP_consts +0, DW_OP_stack_value
+; CHECK-NEXT:    [0x0000000a, 0x00000017): DW_OP_consts +1, DW_OP_stack_value)
 ; CHECK-NEXT:  DW_AT_name [DW_FORM_strp]{{.*}}"b"
 
 ; CHECK: .debug_loc contents:
 ; CHECK:       0x00000000:
-; CHECK-NEXT:    0x0000000000000000 - 0x000000000000000a: DW_OP_consts +0, DW_OP_stack_value
-; CHECK-NEXT:    0x000000000000000a - 0x0000000000000017: DW_OP_consts +1, DW_OP_stack_value
+; CHECK-NEXT:    [0x00000000, 0x0000000a): DW_OP_consts +0, DW_OP_stack_value
+; CHECK-NEXT:    [0x0000000a, 0x00000017): DW_OP_consts +1, DW_OP_stack_value
 ; CHECK:       0x00000022:
-; CHECK-NEXT:    0x0000000000000000 - 0x0000000000000017: DW_OP_breg0 EAX+0, DW_OP_deref
-; CHECK-NEXT:    0x0000000000000017 - 0x0000000000000043: DW_OP_breg5 EBP-8, DW_OP_deref, DW_OP_deref
+; CHECK-NEXT:    [0x00000000, 0x00000017): DW_OP_breg0 EAX+0, DW_OP_deref
+; CHECK-NEXT:    [0x00000017, 0x00000043): DW_OP_breg5 EBP-8, DW_OP_deref, DW_OP_deref
 
 %struct.A = type { i32 (...)**, i32 }
 

Modified: llvm/trunk/test/DebugInfo/X86/dw_op_minus_direct.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/X86/dw_op_minus_direct.ll?rev=322543&r1=322542&r2=322543&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/X86/dw_op_minus_direct.ll (original)
+++ llvm/trunk/test/DebugInfo/X86/dw_op_minus_direct.ll Tue Jan 16 03:17:57 2018
@@ -17,7 +17,7 @@
 
 ; CHECK: .debug_loc contents:
 ; CHECK: 0x00000000:
-; CHECK-NEXT:   0x0000000000000000 - 0x0000000000000004: DW_OP_breg0 RAX+0, DW_OP_constu 0xffffffff, DW_OP_and, DW_OP_constu 0x1, DW_OP_minus, DW_OP_stack_value
+; CHECK-NEXT:   [0x0000000000000000, 0x0000000000000004): DW_OP_breg0 RAX+0, DW_OP_constu 0xffffffff, DW_OP_and, DW_OP_constu 0x1, DW_OP_minus, DW_OP_stack_value
 ;        rax+0, constu 0xffffffff, and, constu 0x00000001, minus, stack-value
 
 source_filename = "minus.c"

Modified: llvm/trunk/test/DebugInfo/X86/dwarfdump-debug-loc-simple.test
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/X86/dwarfdump-debug-loc-simple.test?rev=322543&r1=322542&r2=322543&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/X86/dwarfdump-debug-loc-simple.test (original)
+++ llvm/trunk/test/DebugInfo/X86/dwarfdump-debug-loc-simple.test Tue Jan 16 03:17:57 2018
@@ -4,19 +4,19 @@ Note: the input file was generated from
 CHECK: .debug_info
 CHECK: DW_AT_name{{.*}}"f"
 CHECK: DW_AT_location{{.*}}([[F_LOC:0x[0-9a-f]*]]
-CHECK-NEXT:    0x0000000000000000 - 0x0000000000000023: DW_OP_reg1 ECX
-CHECK-NEXT:    0x0000000000000023 - 0x000000000000005d: DW_OP_breg5 EBP-16)
+CHECK-NEXT:    [0x00000000, 0x00000023): DW_OP_reg1 ECX
+CHECK-NEXT:    [0x00000023, 0x0000005d): DW_OP_breg5 EBP-16)
 CHECK: DW_AT_name{{.*}}"g"
 CHECK: DW_AT_location{{.*}}([[G_LOC:0x[0-9a-f]*]]
-CHECK-NEXT:    0x0000000000000000 - 0x0000000000000020: DW_OP_reg0 EAX
-CHECK-NEXT:    0x0000000000000020 - 0x000000000000005d: DW_OP_breg5 EBP-12)
+CHECK-NEXT:    [0x00000000, 0x00000020): DW_OP_reg0 EAX
+CHECK-NEXT:    [0x00000020, 0x0000005d): DW_OP_breg5 EBP-12)
 
 CHECK: .debug_loc contents:
 CHECK-NEXT: [[F_LOC]]:
 this is actually the wrong location due to PR14763, but that doesn't matter for
 the purposes of testing dwarfdump
-CHECK-NEXT:             0x0000000000000000 - 0x0000000000000023: DW_OP_reg1 ECX
-CHECK-NEXT:             0x0000000000000023 - 0x000000000000005d: DW_OP_breg5 EBP-16
+CHECK-NEXT:             [0x00000000, 0x00000023): DW_OP_reg1 ECX
+CHECK-NEXT:             [0x00000023, 0x0000005d): DW_OP_breg5 EBP-16
 CHECK: [[G_LOC]]:
-CHECK-NEXT:             0x0000000000000000 - 0x0000000000000020: DW_OP_reg0 EAX
-CHECK-NEXT:             0x0000000000000020 - 0x000000000000005d: DW_OP_breg5 EBP-12
+CHECK-NEXT:             [0x00000000, 0x00000020): DW_OP_reg0 EAX
+CHECK-NEXT:             [0x00000020, 0x0000005d): DW_OP_breg5 EBP-12

Modified: llvm/trunk/test/DebugInfo/X86/dwarfdump-ranges-baseaddr-exe.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/X86/dwarfdump-ranges-baseaddr-exe.s?rev=322543&r1=322542&r2=322543&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/X86/dwarfdump-ranges-baseaddr-exe.s (original)
+++ llvm/trunk/test/DebugInfo/X86/dwarfdump-ranges-baseaddr-exe.s Tue Jan 16 03:17:57 2018
@@ -1,13 +1,13 @@
 # RUN: llvm-dwarfdump -v %S/../Inputs/dwarfdump-ranges-baseaddr-exe.elf-x86-64 \
 # RUN:  | FileCheck %s
 
-## Executable binary for test produced from object built in 
+## Executable binary for test produced from object built in
 ## dwarfdump-ranges-baseaddr.s testcase.
 
 # CHECK: .debug_info contents:
 # CHECK: 0x0000000b: DW_TAG_compile_unit [1]
 # CHECK:             DW_AT_low_pc [DW_FORM_addr]       (0x0000000000400078)
 # CHECK-NEXT:        DW_AT_ranges [DW_FORM_sec_offset] (0x00000000
-# CHECK-NEXT:    [0x0000000000400078 - 0x0000000000400079)
-# CHECK-NEXT:    [0x000000000040007b - 0x000000000040007e)
-# CHECK-NEXT:    [0x000000000040007f - 0x0000000000400080))
+# CHECK-NEXT:    [0x0000000000400078, 0x0000000000400079)
+# CHECK-NEXT:    [0x000000000040007b, 0x000000000040007e)
+# CHECK-NEXT:    [0x000000000040007f, 0x0000000000400080))

Modified: llvm/trunk/test/DebugInfo/X86/dwarfdump-ranges-baseaddr.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/X86/dwarfdump-ranges-baseaddr.s?rev=322543&r1=322542&r2=322543&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/X86/dwarfdump-ranges-baseaddr.s (original)
+++ llvm/trunk/test/DebugInfo/X86/dwarfdump-ranges-baseaddr.s Tue Jan 16 03:17:57 2018
@@ -5,14 +5,14 @@
 # CHECK: 0x0000000b: DW_TAG_compile_unit [1]
 # CHECK:             DW_AT_low_pc [DW_FORM_addr]       (0x0000000000000000)
 # CHECK-NEXT:        DW_AT_ranges [DW_FORM_sec_offset] (0x00000000
-# CHECK-NEXT:    [0x0000000000000000 - 0x0000000000000001) ".text"
-# CHECK-NEXT:    [0x0000000000000003 - 0x0000000000000006) ".text"
-# CHECK-NEXT:    [0x0000000000000001 - 0x0000000000000002) ".text.foo1")
+# CHECK-NEXT:    [0x0000000000000000, 0x0000000000000001) ".text"
+# CHECK-NEXT:    [0x0000000000000003, 0x0000000000000006) ".text"
+# CHECK-NEXT:    [0x0000000000000001, 0x0000000000000002) ".text.foo1")
 
 .text
 .globl foo
 .type foo, at function
-foo: 
+foo:
 .Lfunc_begin0:
   nop
 .Ltmp0:
@@ -27,7 +27,7 @@ foo:
 .section .text.foo1,"ax", at progbits
 .Ltmp3:
  nop
-.Ltmp4: 
+.Ltmp4:
  nop
 .Ltmp5:
 

Modified: llvm/trunk/test/DebugInfo/X86/dwarfdump-ranges-unrelocated.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/X86/dwarfdump-ranges-unrelocated.s?rev=322543&r1=322542&r2=322543&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/X86/dwarfdump-ranges-unrelocated.s (original)
+++ llvm/trunk/test/DebugInfo/X86/dwarfdump-ranges-unrelocated.s Tue Jan 16 03:17:57 2018
@@ -4,9 +4,9 @@
 # CHECK: .debug_info contents:
 # CHECK: DW_TAG_compile_unit
 # CHECK: DW_AT_ranges [DW_FORM_sec_offset] (0x00000000
-# CHECK-NEXT:  [0x0000000000000000 - 0x0000000000000001) ".text.foo1"
-# CHECK-NEXT:  [0x0000000000000000 - 0x0000000000000002) ".text.foo2" [4]
-# CHECK-NEXT:  [0x0000000000000000 - 0x0000000000000003) ".text.foo2" [5])
+# CHECK-NEXT:  [0x0000000000000000, 0x0000000000000001) ".text.foo1"
+# CHECK-NEXT:  [0x0000000000000000, 0x0000000000000002) ".text.foo2" [4]
+# CHECK-NEXT:  [0x0000000000000000, 0x0000000000000003) ".text.foo2" [5])
 
 # CHECK: .debug_ranges contents:
 # CHECK:   00000000 0000000000000000 0000000000000001
@@ -17,16 +17,16 @@
 # RUN: llvm-dwarfdump %t | FileCheck %s --check-prefix=BRIEF
 # BRIEF: DW_TAG_compile_unit
 # BRIEF: DW_AT_ranges         (0x00000000
-# BRIEF-NEXT:  [0x0000000000000000 - 0x0000000000000001)
-# BRIEF-NEXT:  [0x0000000000000000 - 0x0000000000000002)
-# BRIEF-NEXT:  [0x0000000000000000 - 0x0000000000000003))
+# BRIEF-NEXT:  [0x0000000000000000, 0x0000000000000001)
+# BRIEF-NEXT:  [0x0000000000000000, 0x0000000000000002)
+# BRIEF-NEXT:  [0x0000000000000000, 0x0000000000000003))
 
 ## Asm code for testcase is a reduced and modified output from next
 ## invocation and source:
 # clang test.cpp -S -o test.s -gmlt -ffunction-sections
 # test.cpp:
-#   void foo1() { }  
-#   void foo2() { }  
+#   void foo1() { }
+#   void foo2() { }
 
 .section .text.foo1,"ax", at progbits
 .Lfunc_begin0:

Modified: llvm/trunk/test/DebugInfo/X86/float_const_loclist.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/X86/float_const_loclist.ll?rev=322543&r1=322542&r2=322543&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/X86/float_const_loclist.ll (original)
+++ llvm/trunk/test/DebugInfo/X86/float_const_loclist.ll Tue Jan 16 03:17:57 2018
@@ -21,11 +21,11 @@
 ; CHECK: .debug_info contents:
 ; CHECK: DW_TAG_variable
 ; CHECK-NEXT:  DW_AT_location {{.*}} (
-; CHECK-NEXT:    [[START:0x.*]] - [[END:0x.*]]: DW_OP_constu 0xc8f5c28f5c28f800, DW_OP_piece 0x8, DW_OP_constu 0x4000, DW_OP_bit_piece 0x10 0x40)
+; CHECK-NEXT:    [0x[[START:.*]], 0x[[END:.*]]): DW_OP_constu 0xc8f5c28f5c28f800, DW_OP_piece 0x8, DW_OP_constu 0x4000, DW_OP_bit_piece 0x10 0x40)
 ; CHECK-NEXT:  DW_AT_name {{.*}}"ld"
 ; CHECK: DW_TAG_variable
 ; CHECK-NEXT:  DW_AT_location {{.*}} (
-; CHECK-NEXT:    [[START]] - [[END]]: DW_OP_constu 0x4048f5c3)
+; CHECK-NEXT:    [0x[[START]], 0x[[END]]): DW_OP_constu 0x4048f5c3)
 ; CHECK-NEXT:  DW_AT_name {{.*}}"f"
 
 source_filename = "test.c"

Modified: llvm/trunk/test/DebugInfo/X86/inlined-formal-parameter.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/X86/inlined-formal-parameter.ll?rev=322543&r1=322542&r2=322543&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/X86/inlined-formal-parameter.ll (original)
+++ llvm/trunk/test/DebugInfo/X86/inlined-formal-parameter.ll Tue Jan 16 03:17:57 2018
@@ -20,7 +20,7 @@
 ; CHECK-NEXT:    DW_AT_abstract_origin {{.*}} "bar"
 ; CHECK:         DW_TAG_formal_parameter
 ; CHECK-NEXT:      DW_AT_location [DW_FORM_data4]	(
-; CHECK-NEXT:        {{.*}} - {{.*}}: DW_OP_consts +0)
+; CHECK-NEXT:        [{{.*}}, {{.*}}): DW_OP_consts +0)
 ; CHECK-NEXT:      DW_AT_abstract_origin {{.*}} "a"
 
 target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"

Modified: llvm/trunk/test/DebugInfo/X86/live-debug-variables.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/X86/live-debug-variables.ll?rev=322543&r1=322542&r2=322543&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/X86/live-debug-variables.ll (original)
+++ llvm/trunk/test/DebugInfo/X86/live-debug-variables.ll Tue Jan 16 03:17:57 2018
@@ -10,11 +10,11 @@
 ; Generated from:
 ;
 ; extern int foobar(int, int, int, int, int);
-; 
+;
 ; int F(int i1, int i2, int i3, int i4, int i5) {
 ;   return foobar(i1, i2, i3, i4, i5);
 ; }
-; 
+;
 ; int foo(int a, int b, int c, int d, int e) {
 ;   return F(a,b,c,d,e) +
 ;          F(a,b,c,d,e) +
@@ -25,7 +25,7 @@
 ; CHECK:      .debug_loc contents:
 ; CHECK-NEXT: 0x00000000:
 ;   We currently emit an entry for the function prologue, too, which could be optimized away.
-; CHECK:              0x000000000000001f - 0x000000000000003c: DW_OP_reg3 RBX
+; CHECK:              [0x000000000000001f, 0x000000000000003c): DW_OP_reg3 RBX
 ;   We should only have one entry inside the function.
 ; CHECK-NOT: :
 

Modified: llvm/trunk/test/DebugInfo/X86/pieces-1.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/X86/pieces-1.ll?rev=322543&r1=322542&r2=322543&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/X86/pieces-1.ll (original)
+++ llvm/trunk/test/DebugInfo/X86/pieces-1.ll Tue Jan 16 03:17:57 2018
@@ -17,9 +17,9 @@
 ; CHECK: .debug_loc contents:
 ;
 
-; CHECK: 0x0000000000000000 - [[LTMP3:.*]]: DW_OP_reg5 RDI, DW_OP_piece 0x8, DW_OP_reg4 RSI, DW_OP_piece 0x4
+; CHECK: [0x0000000000000000, 0x[[LTMP3:.*]]): DW_OP_reg5 RDI, DW_OP_piece 0x8, DW_OP_reg4 RSI, DW_OP_piece 0x4
 ; 0x0000000000000006 - 0x0000000000000008: rbp-8, piece 0x8, rax, piece 0x4 )
-; CHECK: [[LTMP3]] - {{.*}}: DW_OP_breg6 RBP-8, DW_OP_piece 0x8, DW_OP_reg4 RSI, DW_OP_piece 0x4
+; CHECK: [0x[[LTMP3]], {{.*}}): DW_OP_breg6 RBP-8, DW_OP_piece 0x8, DW_OP_reg4 RSI, DW_OP_piece 0x4
 
 target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
 target triple = "x86_64-apple-macosx10.9.0"

Modified: llvm/trunk/test/DebugInfo/X86/pieces-2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/X86/pieces-2.ll?rev=322543&r1=322542&r2=322543&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/X86/pieces-2.ll (original)
+++ llvm/trunk/test/DebugInfo/X86/pieces-2.ll Tue Jan 16 03:17:57 2018
@@ -18,7 +18,7 @@
 ;
 ; CHECK: DW_TAG_variable [4]
 ; CHECK-NEXT:   DW_AT_location [DW_FORM_data4] (
-; CHECK-NEXT:     0x0000000000000004 - 0x0000000000000005: DW_OP_reg0 RAX, DW_OP_piece 0x4)
+; CHECK-NEXT:     [0x0000000000000004, 0x0000000000000005): DW_OP_reg0 RAX, DW_OP_piece 0x4)
 ; CHECK-NEXT:  DW_AT_name {{.*}}"i1"
 
 ; ModuleID = '/Volumes/Data/llvm/test/DebugInfo/X86/sroasplit-1.ll'

Modified: llvm/trunk/test/DebugInfo/X86/pieces-3.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/X86/pieces-3.ll?rev=322543&r1=322542&r2=322543&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/X86/pieces-3.ll (original)
+++ llvm/trunk/test/DebugInfo/X86/pieces-3.ll Tue Jan 16 03:17:57 2018
@@ -17,8 +17,8 @@
 ;
 ; CHECK: DW_TAG_formal_parameter [3]
 ; CHECK-NEXT:   DW_AT_location [DW_FORM_data4]        (
-; CHECK-NEXT:     0x0000000000000000 - 0x0000000000000004: DW_OP_reg5 RDI, DW_OP_piece 0x8, DW_OP_piece 0x4, DW_OP_reg4 RSI, DW_OP_piece 0x4
-; CHECK-NEXT:     0x0000000000000004 - 0x0000000000000008: DW_OP_reg5 RDI, DW_OP_piece 0x8, DW_OP_piece 0x4, DW_OP_reg4 RSI, DW_OP_piece 0x4)
+; CHECK-NEXT:     [0x0000000000000000, 0x0000000000000004): DW_OP_reg5 RDI, DW_OP_piece 0x8, DW_OP_piece 0x4, DW_OP_reg4 RSI, DW_OP_piece 0x4
+; CHECK-NEXT:     [0x0000000000000004, 0x0000000000000008): DW_OP_reg5 RDI, DW_OP_piece 0x8, DW_OP_piece 0x4, DW_OP_reg4 RSI, DW_OP_piece 0x4)
 ; CHECK-NEXT:   DW_AT_name {{.*}}"outer"
 ; CHECK: DW_TAG_variable
 ; CHECK-NEXT:   DW_AT_location {{.*}}(DW_OP_reg4 RSI, DW_OP_piece 0x4)

Modified: llvm/trunk/test/DebugInfo/X86/spill-nospill.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/X86/spill-nospill.ll?rev=322543&r1=322542&r2=322543&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/X86/spill-nospill.ll (original)
+++ llvm/trunk/test/DebugInfo/X86/spill-nospill.ll Tue Jan 16 03:17:57 2018
@@ -42,13 +42,13 @@
 
 ; DWARF:      DW_TAG_variable
 ; DWARF-NEXT:   DW_AT_location        (
-; DWARF-NEXT:      {{.*}} - {{.*}}: DW_OP_breg7 RSP+36
-; DWARF-NEXT:      {{.*}} - {{.*}}: DW_OP_reg0 RAX)
+; DWARF-NEXT:      [{{.*}}, {{.*}}): DW_OP_breg7 RSP+36
+; DWARF-NEXT:      [{{.*}}, {{.*}}): DW_OP_reg0 RAX)
 ; DWARF-NEXT:   DW_AT_name    ("x")
 
 ; DWARF:      DW_TAG_variable
 ; DWARF-NEXT:   DW_AT_location        (
-; DWARF-NEXT:      {{.*}} - {{.*}}: DW_OP_reg4 RSI)
+; DWARF-NEXT:      [{{.*}},  {{.*}}): DW_OP_reg4 RSI)
 ; DWARF-NEXT:   DW_AT_name    ("y")
 
 ; ModuleID = 'spill-nospill.c'

Modified: llvm/trunk/test/DebugInfo/X86/sret.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/X86/sret.ll?rev=322543&r1=322542&r2=322543&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/X86/sret.ll (original)
+++ llvm/trunk/test/DebugInfo/X86/sret.ll Tue Jan 16 03:17:57 2018
@@ -9,10 +9,10 @@
 ; RUN: llc -O0 -fast-isel=true -mtriple=x86_64-apple-darwin -filetype=obj -o - %s | llvm-dwarfdump -v - | FileCheck %s
 ; RUN: llc -O0 -fast-isel=false -mtriple=x86_64-apple-darwin -filetype=obj -o - %s | llvm-dwarfdump -v - | FileCheck %s
 ; CHECK: _ZN1B9AInstanceEv
-; CHECK: DW_TAG_variable  
+; CHECK: DW_TAG_variable
 ; CHECK-NEXT:   DW_AT_location [DW_FORM_sec_offset] (0x00000000
-; CHECK-NEXT:     {{.*}} - {{.*}}: DW_OP_breg5 RDI+0
-; CHECK-NEXT:     {{.*}} - {{.*}}: DW_OP_breg6 RBP-24, DW_OP_deref)
+; CHECK-NEXT:     [{{.*}}, {{.*}}): DW_OP_breg5 RDI+0
+; CHECK-NEXT:     [{{.*}}, {{.*}}): DW_OP_breg6 RBP-24, DW_OP_deref)
 ; CHECK-NEXT:   DW_AT_name {{.*}}"a"
 
 %class.A = type { i32 (...)**, i32 }

Modified: llvm/trunk/test/DebugInfo/X86/stack-value-piece.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/X86/stack-value-piece.ll?rev=322543&r1=322542&r2=322543&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/X86/stack-value-piece.ll (original)
+++ llvm/trunk/test/DebugInfo/X86/stack-value-piece.ll Tue Jan 16 03:17:57 2018
@@ -7,7 +7,7 @@
 ;   I r = {i, 0};
 ;   return r;
 ; }
-;  
+;
 ; typedef struct { float a, b; } F;
 ; F f(float f) {
 ;   F r = {f, 0};
@@ -19,21 +19,21 @@
 ; CHECK:   DW_AT_name {{.*}} "i"
 ; CHECK:   DW_TAG_variable
 ; CHECK-NEXT:   DW_AT_location {{.*}} ([[I:.*]]
-; CHECK-NEXT:     {{.*}} - {{.*}}: DW_OP_reg5 RDI, DW_OP_piece 0x4, DW_OP_constu 0x0, DW_OP_stack_value, DW_OP_piece 0x4)
+; CHECK-NEXT:     [{{.*}}, {{.*}}): DW_OP_reg5 RDI, DW_OP_piece 0x4, DW_OP_constu 0x0, DW_OP_stack_value, DW_OP_piece 0x4)
 ; CHECK-NEXT:   DW_AT_name {{.*}} "r"
 ;
 ; CHECK: DW_TAG_subprogram
 ; CHECK:   DW_AT_name {{.*}} "f"
 ; CHECK:   DW_TAG_variable
 ; CHECK-NEXT:   DW_AT_location {{.*}} ([[F:.*]]
-; CHECK-NEXT:     {{.*}} - {{.*}}: DW_OP_reg17 XMM0, DW_OP_piece 0x4, DW_OP_constu 0x0, DW_OP_stack_value, DW_OP_piece 0x4)
+; CHECK-NEXT:     [{{.*}}, {{.*}}): DW_OP_reg17 XMM0, DW_OP_piece 0x4, DW_OP_constu 0x0, DW_OP_stack_value, DW_OP_piece 0x4)
 ; CHECK-NEXT:   DW_AT_name {{.*}} "r"
 ;
 ; CHECK: .debug_loc contents:
 ; CHECK:      [[I]]:
-; CHECK-NEXT:   {{.*}} - {{.*}}: DW_OP_reg5 RDI, DW_OP_piece 0x4, DW_OP_constu 0x0, DW_OP_stack_value, DW_OP_piece 0x4
+; CHECK-NEXT:   [{{.*}}, {{.*}}): DW_OP_reg5 RDI, DW_OP_piece 0x4, DW_OP_constu 0x0, DW_OP_stack_value, DW_OP_piece 0x4
 ; CHECK:      [[F]]:
-; CHECK-NEXT:   {{.*}} - {{.*}}: DW_OP_reg17 XMM0, DW_OP_piece 0x4, DW_OP_constu 0x0, DW_OP_stack_value, DW_OP_piece 0x4
+; CHECK-NEXT:   [{{.*}}, {{.*}}): DW_OP_reg17 XMM0, DW_OP_piece 0x4, DW_OP_constu 0x0, DW_OP_stack_value, DW_OP_piece 0x4
 
 source_filename = "stack-value-piece.c"
 target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"

Modified: llvm/trunk/test/DebugInfo/X86/subregisters.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/X86/subregisters.ll?rev=322543&r1=322542&r2=322543&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/X86/subregisters.ll (original)
+++ llvm/trunk/test/DebugInfo/X86/subregisters.ll Tue Jan 16 03:17:57 2018
@@ -9,7 +9,7 @@
 ; CHECK:  .debug_info contents:
 ; CHECK:  DW_TAG_variable
 ; CHECK-NEXT:  DW_AT_location [DW_FORM_data4]	(
-; CHECK-NEXT:    {{.*}} - {{.*}}: DW_OP_reg4 RSI)
+; CHECK-NEXT:    [{{.*}}, {{.*}}): DW_OP_reg4 RSI)
 ; CHECK-NEXT:  DW_AT_name [DW_FORM_strp]{{.*}} "a"
 ;
 ; struct bar {

Modified: llvm/trunk/test/DebugInfo/dwarfdump-ranges.test
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/dwarfdump-ranges.test?rev=322543&r1=322542&r2=322543&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/dwarfdump-ranges.test (original)
+++ llvm/trunk/test/DebugInfo/dwarfdump-ranges.test Tue Jan 16 03:17:57 2018
@@ -4,14 +4,14 @@ CHECK: .debug_info contents:
 CHECK: DW_TAG_compile_unit
 CHECK-NOT: TAG
 CHECK:  DW_AT_ranges [DW_FORM_data4]      (0x00000000
-CHECK-NEXT:          [0x000000000000062c - 0x0000000000000637)
-CHECK-NEXT:          [0x0000000000000637 - 0x000000000000063d))
+CHECK-NEXT:          [0x000000000000062c, 0x0000000000000637)
+CHECK-NEXT:          [0x0000000000000637, 0x000000000000063d))
 
 CHECK: DW_TAG_compile_unit
 CHECK-NOT: TAG
 CHECK:  DW_AT_ranges [DW_FORM_data4]      (0x00000030
-CHECK-NEXT:          [0x0000000000000640 - 0x000000000000064b)
-CHECK-NEXT:          [0x0000000000000637 - 0x000000000000063d))
+CHECK-NEXT:          [0x0000000000000640, 0x000000000000064b)
+CHECK-NEXT:          [0x0000000000000637, 0x000000000000063d))
 
 
 CHECK:      .debug_ranges contents:

Modified: llvm/trunk/test/MC/ARM/dwarf-asm-multiple-sections-dwarf-2.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/dwarf-asm-multiple-sections-dwarf-2.s?rev=322543&r1=322542&r2=322543&view=diff
==============================================================================
--- llvm/trunk/test/MC/ARM/dwarf-asm-multiple-sections-dwarf-2.s (original)
+++ llvm/trunk/test/MC/ARM/dwarf-asm-multiple-sections-dwarf-2.s Tue Jan 16 03:17:57 2018
@@ -35,8 +35,8 @@ b:
 
 // DWARF: .debug_aranges contents:
 // DWARF-NEXT: Address Range Header: length = 0x00000024, version = 0x0002, cu_offset = 0x00000000, addr_size = 0x04, seg_size = 0x00
-// DWARF-NEXT: [0x00000000 - 0x00000004)
-// DWARF-NEXT: [0x00000000 - 0x00000004)
+// DWARF-NEXT: [0x00000000, 0x00000004)
+// DWARF-NEXT: [0x00000000, 0x00000004)
 
 // DWARF: .debug_line contents:
 // DWARF:      0x0000000000000000      7      0      1   0   0 is_stmt

Modified: llvm/trunk/test/MC/ARM/dwarf-asm-multiple-sections.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/dwarf-asm-multiple-sections.s?rev=322543&r1=322542&r2=322543&view=diff
==============================================================================
--- llvm/trunk/test/MC/ARM/dwarf-asm-multiple-sections.s (original)
+++ llvm/trunk/test/MC/ARM/dwarf-asm-multiple-sections.s Tue Jan 16 03:17:57 2018
@@ -47,8 +47,8 @@ b:
 
 // DWARF: .debug_aranges contents:
 // DWARF-NEXT: Address Range Header: length = 0x00000024, version = 0x0002, cu_offset = 0x00000000, addr_size = 0x04, seg_size = 0x00
-// DWARF-NEXT: [0x00000000 - 0x00000004)
-// DWARF-NEXT: [0x00000000 - 0x00000004)
+// DWARF-NEXT: [0x00000000, 0x00000004)
+// DWARF-NEXT: [0x00000000, 0x00000004)
 
 
 // DWARF-DL: .debug_line contents:

Modified: llvm/trunk/test/MC/ARM/dwarf-asm-nonstandard-section.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/dwarf-asm-nonstandard-section.s?rev=322543&r1=322542&r2=322543&view=diff
==============================================================================
--- llvm/trunk/test/MC/ARM/dwarf-asm-nonstandard-section.s (original)
+++ llvm/trunk/test/MC/ARM/dwarf-asm-nonstandard-section.s Tue Jan 16 03:17:57 2018
@@ -29,7 +29,7 @@ b:
 
 // DWARF: .debug_aranges contents:
 // DWARF-NEXT: Address Range Header: length = 0x0000001c, version = 0x0002, cu_offset = 0x00000000, addr_size = 0x04, seg_size = 0x00
-// DWARF-NEXT: [0x00000000 - 0x00000004)
+// DWARF-NEXT: [0x00000000, 0x00000004)
 
 
 // DWARF: .debug_line contents:

Modified: llvm/trunk/test/MC/ARM/dwarf-asm-single-section.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/dwarf-asm-single-section.s?rev=322543&r1=322542&r2=322543&view=diff
==============================================================================
--- llvm/trunk/test/MC/ARM/dwarf-asm-single-section.s (original)
+++ llvm/trunk/test/MC/ARM/dwarf-asm-single-section.s Tue Jan 16 03:17:57 2018
@@ -30,7 +30,7 @@ a:
 
 // DWARF: .debug_aranges contents:
 // DWARF-NEXT: Address Range Header: length = 0x0000001c, version = 0x0002, cu_offset = 0x00000000, addr_size = 0x04, seg_size = 0x00
-// DWARF-NEXT: [0x00000000 - 0x00000004)
+// DWARF-NEXT: [0x00000000, 0x00000004)
 
 // DWARF: .debug_line contents:
 // DWARF:      0x0000000000000000      7      0      1   0   0 is_stmt

Modified: llvm/trunk/test/tools/dsymutil/X86/basic-linking-x86.test
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/tools/dsymutil/X86/basic-linking-x86.test?rev=322543&r1=322542&r2=322543&view=diff
==============================================================================
--- llvm/trunk/test/tools/dsymutil/X86/basic-linking-x86.test (original)
+++ llvm/trunk/test/tools/dsymutil/X86/basic-linking-x86.test Tue Jan 16 03:17:57 2018
@@ -144,13 +144,13 @@ CHECK-NOT: .debug_loc contents
 
 CHECK:.debug_aranges contents:
 CHECK-NEXT:Address Range Header: length = 0x0000002c, version = 0x0002, cu_offset = 0x00000000, addr_size = 0x08, seg_size = 0x00
-CHECK-NEXT:[0x0000000100000ea0 - 0x0000000100000ec4)
+CHECK-NEXT:[0x0000000100000ea0, 0x0000000100000ec4)
 CHECK-NEXT:Address Range Header: length = 0x0000003c, version = 0x0002, cu_offset = 0x00000081, addr_size = 0x08, seg_size = 0x00
-CHECK-NEXT:[0x0000000100000ed0 - 0x0000000100000f19)
-CHECK-NEXT:[0x0000000100000f20 - 0x0000000100000f37)
+CHECK-NEXT:[0x0000000100000ed0, 0x0000000100000f19)
+CHECK-NEXT:[0x0000000100000f20, 0x0000000100000f37)
 CHECK-NEXT:Address Range Header: length = 0x0000003c, version = 0x0002, cu_offset = 0x00000126, addr_size = 0x08, seg_size = 0x00
-CHECK-NEXT:[0x0000000100000f40 - 0x0000000100000f84)
-CHECK-NEXT:[0x0000000100000f90 - 0x0000000100000fa9)
+CHECK-NEXT:[0x0000000100000f40, 0x0000000100000f84)
+CHECK-NEXT:[0x0000000100000f90, 0x0000000100000fa9)
 
 CHECK: .debug_line contents:
 CHECK:                Dir  Mod Time   File Len   File Name

Modified: llvm/trunk/test/tools/dsymutil/X86/basic-lto-dw4-linking-x86.test
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/tools/dsymutil/X86/basic-lto-dw4-linking-x86.test?rev=322543&r1=322542&r2=322543&view=diff
==============================================================================
--- llvm/trunk/test/tools/dsymutil/X86/basic-lto-dw4-linking-x86.test (original)
+++ llvm/trunk/test/tools/dsymutil/X86/basic-lto-dw4-linking-x86.test Tue Jan 16 03:17:57 2018
@@ -74,7 +74,7 @@ CHECK:      DW_AT_prototyped (true)
 CHECK:      DW_AT_type (cu + 0x002a
 CHECK:      DW_TAG_formal_parameter
 CHECK:        DW_AT_location (0x00000000
-CHECK:          0x0000000000000000 - 0x000000000000000c: DW_OP_reg5 RDI, DW_OP_piece 0x4)
+CHECK:          [0x0000000000000000, 0x000000000000000c): DW_OP_reg5 RDI, DW_OP_piece 0x4)
 CHECK:        DW_AT_name ("arg")
 CHECK:        DW_AT_type (cu + 0x002a
 CHECK:      DW_TAG_inlined_subroutine
@@ -107,14 +107,14 @@ CHECK:      DW_AT_frame_base (DW_OP_reg6
 CHECK:      DW_AT_name ("bar")
 CHECK:      DW_TAG_formal_parameter
 CHECK:        DW_AT_location (0x00000025
-CHECK:          0x0000000000000000 - 0x000000000000000f: DW_OP_reg5 RDI, DW_OP_piece 0x4
-CHECK:          0x0000000000000019 - 0x000000000000001d: DW_OP_reg5 RDI, DW_OP_piece 0x4)
+CHECK:          [0x0000000000000000, 0x000000000000000f): DW_OP_reg5 RDI, DW_OP_piece 0x4
+CHECK:          [0x0000000000000019, 0x000000000000001d): DW_OP_reg5 RDI, DW_OP_piece 0x4)
 CHECK:        DW_AT_name ("arg")
 CHECK:      DW_TAG_inlined_subroutine
 CHECK:        DW_AT_abstract_origin (cu + 0x0044 "inc")
 CHECK:        DW_AT_ranges (0x00000000
-CHECK:           [0x0000000100000f94 - 0x0000000100000f9a)
-CHECK:           [0x0000000100000f9f - 0x0000000100000fa7))
+CHECK:           [0x0000000100000f94, 0x0000000100000f9a)
+CHECK:           [0x0000000100000f9f, 0x0000000100000fa7))
 
 CHECK:      NULL
 CHECK:    NULL
@@ -122,20 +122,20 @@ CHECK:    NULL
 
 CHECK: .debug_loc contents:
 CHECK-NEXT: 0x00000000:
-CHECK-NEXT:              0x0000000000000000 - 0x000000000000000c: DW_OP_reg5 RDI, DW_OP_piece 0x4
+CHECK-NEXT:              [0x0000000000000000, 0x000000000000000c): DW_OP_reg5 RDI, DW_OP_piece 0x4
 CHECK-NOT: :
 CHECK:      0x00000025:
-CHECK-NEXT:              0x0000000000000000 - 0x000000000000000f: DW_OP_reg5 RDI, DW_OP_piece 0x4
-CHECK-NEXT:              0x0000000000000019 - 0x000000000000001d: DW_OP_reg5 RDI, DW_OP_piece 0x4
+CHECK-NEXT:              [0x0000000000000000, 0x000000000000000f): DW_OP_reg5 RDI, DW_OP_piece 0x4
+CHECK-NEXT:              [0x0000000000000019, 0x000000000000001d): DW_OP_reg5 RDI, DW_OP_piece 0x4
 
 
 CHECK: .debug_aranges contents:
 CHECK-NEXT: Address Range Header: length = 0x0000002c, version = 0x0002, cu_offset = 0x00000000, addr_size = 0x08, seg_size = 0x00
-CHECK-NEXT: [0x0000000100000f40 - 0x0000000100000f4b)
+CHECK-NEXT: [0x0000000100000f40,  0x0000000100000f4b)
 CHECK-NEXT: Address Range Header: length = 0x0000002c, version = 0x0002, cu_offset = 0x00000077, addr_size = 0x08, seg_size = 0x00
-CHECK-NEXT: [0x0000000100000f50 - 0x0000000100000f87)
+CHECK-NEXT: [0x0000000100000f50, 0x0000000100000f87)
 CHECK-NEXT: Address Range Header: length = 0x0000002c, version = 0x0002, cu_offset = 0x0000011b, addr_size = 0x08, seg_size = 0x00
-CHECK-NEXT: [0x0000000100000f90 - 0x0000000100000fb4)
+CHECK-NEXT: [0x0000000100000f90, 0x0000000100000fb4)
 
 CHECK: .debug_line contents:
 CHECK:                 Dir  Mod Time   File Len   File Name

Modified: llvm/trunk/test/tools/dsymutil/X86/basic-lto-linking-x86.test
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/tools/dsymutil/X86/basic-lto-linking-x86.test?rev=322543&r1=322542&r2=322543&view=diff
==============================================================================
--- llvm/trunk/test/tools/dsymutil/X86/basic-lto-linking-x86.test (original)
+++ llvm/trunk/test/tools/dsymutil/X86/basic-lto-linking-x86.test Tue Jan 16 03:17:57 2018
@@ -77,7 +77,7 @@ CHECK:      DW_TAG_formal_parameter
 CHECK:        DW_AT_name ("arg")
 CHECK:        DW_AT_type (0x0000000000000063
 CHECK:        DW_AT_location (0x00000000
-CHECK:          0x0000000000000000 - 0x000000000000000e: DW_OP_reg5 RDI, DW_OP_piece 0x4)
+CHECK:          [0x0000000000000000, 0x000000000000000e): DW_OP_reg5 RDI, DW_OP_piece 0x4)
 CHECK:      DW_TAG_inlined_subroutine
 CHECK:        DW_AT_abstract_origin (cu + 0x00a7 "inc")
 CHECK:        DW_AT_low_pc (0x0000000100000f63)
@@ -115,16 +115,16 @@ CHECK:      DW_TAG_formal_parameter
 CHECK:        DW_AT_name ("arg")
 CHECK:        DW_AT_type (0x0000000000000063
 CHECK:        DW_AT_location (0x00000025
-CHECK:          0x0000000000000000 - 0x000000000000000f: DW_OP_reg5 RDI, DW_OP_piece 0x4
-CHECK:          0x0000000000000019 - 0x000000000000001d: DW_OP_reg5 RDI, DW_OP_piece 0x4)
+CHECK:          [0x0000000000000000, 0x000000000000000f): DW_OP_reg5 RDI, DW_OP_piece 0x4
+CHECK:          [0x0000000000000019, 0x000000000000001d): DW_OP_reg5 RDI, DW_OP_piece 0x4)
 CHECK:      DW_TAG_lexical_block
 CHECK:        DW_AT_low_pc (0x0000000100000f94)
 CHECK:        DW_AT_high_pc (0x0000000100000fa7)
 CHECK:        DW_TAG_inlined_subroutine
 CHECK:          DW_AT_abstract_origin (cu + 0x009a "inc")
 CHECK:          DW_AT_ranges (0x00000000
-CHECK:             [0x0000000100000f94 - 0x0000000100000f9a)
-CHECK:             [0x0000000100000f9f - 0x0000000100000fa7))
+CHECK:             [0x0000000100000f94, 0x0000000100000f9a)
+CHECK:             [0x0000000100000f9f, 0x0000000100000fa7))
 CHECK:        NULL
 CHECK:      NULL
 CHECK:    DW_TAG_subprogram
@@ -134,19 +134,19 @@ CHECK:    NULL
 
 CHECK: .debug_loc contents:
 CHECK-NEXT: 0x00000000:
-CHECK-NEXT:              0x0000000000000000 - 0x000000000000000e: DW_OP_reg5 RDI, DW_OP_piece 0x4
+CHECK-NEXT:              [0x0000000000000000, 0x000000000000000e): DW_OP_reg5 RDI, DW_OP_piece 0x4
 CHECK-NOT: :
 CHECK:      0x00000025:
-CHECK-NEXT:              0x0000000000000000 - 0x000000000000000f: DW_OP_reg5 RDI, DW_OP_piece 0x4
-CHECK-NEXT:              0x0000000000000019 - 0x000000000000001d: DW_OP_reg5 RDI, DW_OP_piece 0x4
+CHECK-NEXT:              [0x0000000000000000, 0x000000000000000f): DW_OP_reg5 RDI, DW_OP_piece 0x4
+CHECK-NEXT:              [0x0000000000000019, 0x000000000000001d): DW_OP_reg5 RDI, DW_OP_piece 0x4
 
 CHECK: .debug_aranges contents:
 CHECK-NEXT: Address Range Header: length = 0x0000002c, version = 0x0002, cu_offset = 0x00000000, addr_size = 0x08, seg_size = 0x00
-CHECK-NEXT: [0x0000000100000f40 - 0x0000000100000f4b)
+CHECK-NEXT: [0x0000000100000f40, 0x0000000100000f4b)
 CHECK-NEXT: Address Range Header: length = 0x0000002c, version = 0x0002, cu_offset = 0x00000081, addr_size = 0x08, seg_size = 0x00
-CHECK-NEXT: [0x0000000100000f50 - 0x0000000100000f89)
+CHECK-NEXT: [0x0000000100000f50, 0x0000000100000f89)
 CHECK-NEXT: Address Range Header: length = 0x0000002c, version = 0x0002, cu_offset = 0x0000013a, addr_size = 0x08, seg_size = 0x00
-CHECK-NEXT: [0x0000000100000f90 - 0x0000000100000fb4)
+CHECK-NEXT: [0x0000000100000f90, 0x0000000100000fb4)
 
 
 CHECK: .debug_line contents

Modified: llvm/trunk/test/tools/llvm-dwarfdump/X86/debug_loc_offset.test
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/tools/llvm-dwarfdump/X86/debug_loc_offset.test?rev=322543&r1=322542&r2=322543&view=diff
==============================================================================
--- llvm/trunk/test/tools/llvm-dwarfdump/X86/debug_loc_offset.test (original)
+++ llvm/trunk/test/tools/llvm-dwarfdump/X86/debug_loc_offset.test Tue Jan 16 03:17:57 2018
@@ -4,8 +4,8 @@ RUN: | FileCheck %s --check-prefix=CHECK
 
 # CHECK-A: .debug_loc contents:
 # CHECK-A: 0x00000000:
-# CHECK-A-NEXT: 0x0000000000000000 - 0x0000000000000003: DW_OP_reg5 RDI
-# CHECK-A-NEXT: 0x0000000000000003 - 0x0000000000000004: DW_OP_reg0 RAX
+# CHECK-A-NEXT: [0x0000000000000000, 0x0000000000000003): DW_OP_reg5 RDI
+# CHECK-A-NEXT: [0x0000000000000003, 0x0000000000000004): DW_OP_reg0 RAX
 
 RUN: llvm-mc %S/debugloc.s -filetype obj -triple x86_64-linux-elf -o - \
 RUN: | llvm-dwarfdump --debug-loc=0x36 - \
@@ -13,5 +13,5 @@ RUN: | FileCheck %s --check-prefix=CHECK
 
 # CHECK-B: .debug_loc contents:
 # CHECK-B: 0x00000036:
-# CHECK-B-NEXT: 0x0000000000000010 - 0x0000000000000013: DW_OP_reg5 RDI
-# CHECK-B-NEXT: 0x0000000000000013 - 0x0000000000000014: DW_OP_reg0 RAX
+# CHECK-B-NEXT: [0x0000000000000010, 0x0000000000000013): DW_OP_reg5 RDI
+# CHECK-B-NEXT: [0x0000000000000013, 0x0000000000000014): DW_OP_reg0 RAX

Modified: llvm/trunk/test/tools/llvm-dwarfdump/X86/debugloc.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/tools/llvm-dwarfdump/X86/debugloc.s?rev=322543&r1=322542&r2=322543&view=diff
==============================================================================
--- llvm/trunk/test/tools/llvm-dwarfdump/X86/debugloc.s (original)
+++ llvm/trunk/test/tools/llvm-dwarfdump/X86/debugloc.s Tue Jan 16 03:17:57 2018
@@ -5,12 +5,12 @@
 # CHECK: .debug_loc contents:
 
 # CHECK: 0x00000000:
-# CHECK-NEXT: 0x0000000000000000 - 0x0000000000000003: DW_OP_reg5 RDI
-# CHECK-NEXT: 0x0000000000000003 - 0x0000000000000004: DW_OP_reg0 RAX
+# CHECK-NEXT: [0x0000000000000000, 0x0000000000000003): DW_OP_reg5 RDI
+# CHECK-NEXT: [0x0000000000000003, 0x0000000000000004): DW_OP_reg0 RAX
 
 # CHECK: 0x00000036:
-# CHECK-NEXT: 0x0000000000000010 - 0x0000000000000013: DW_OP_reg5 RDI
-# CHECK-NEXT: 0x0000000000000013 - 0x0000000000000014: DW_OP_reg0 RAX
+# CHECK-NEXT: [0x0000000000000010, 0x0000000000000013): DW_OP_reg5 RDI
+# CHECK-NEXT: [0x0000000000000013, 0x0000000000000014): DW_OP_reg0 RAX
 
 # Source:
 #   int* foo(int* i) { return i; }

Modified: llvm/trunk/test/tools/llvm-dwarfdump/X86/verify_die_ranges.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/tools/llvm-dwarfdump/X86/verify_die_ranges.s?rev=322543&r1=322542&r2=322543&view=diff
==============================================================================
--- llvm/trunk/test/tools/llvm-dwarfdump/X86/verify_die_ranges.s (original)
+++ llvm/trunk/test/tools/llvm-dwarfdump/X86/verify_die_ranges.s Tue Jan 16 03:17:57 2018
@@ -70,7 +70,7 @@ Lset0 = Lsection_abbrev-Lsection_abbrev
 Lset1 = Lline_table_start0-Lsection_line ## DW_AT_stmt_list
 	.long	Lset1
 	.long	63                      ## DW_AT_comp_dir
-	.quad	7        				## DW_AT_low_pc -- error: Invalid address range [0x00000007 - 0x00000006].
+	.quad	7        				## DW_AT_low_pc -- error: Invalid address range [0x0000000000000007, 0x0000000000000006)
 	.quad	6             			## DW_AT_high_pc
 	.byte	0                       ## End Of Children Mark
 .subsections_via_symbols




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