[llvm] r322522 - [x86] regenerate test checks; NFC

[Sanjay Patel via llvm-commits]

Author: spatel
Date: Mon Jan 15 13:32:39 2018
New Revision: 322522

URL: http://llvm.org/viewvc/llvm-project?rev=322522&view=rev
Log:
[x86] regenerate test checks; NFC

Modified:
    llvm/trunk/test/CodeGen/X86/and-encoding.ll

Modified: llvm/trunk/test/CodeGen/X86/and-encoding.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/and-encoding.ll?rev=322522&r1=322521&r2=322522&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/and-encoding.ll (original)
+++ llvm/trunk/test/CodeGen/X86/and-encoding.ll Mon Jan 15 13:32:39 2018
@@ -1,4 +1,5 @@
-; RUN: llc -show-mc-encoding < %s | FileCheck %s
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -mtriple=x86_64-unknown-unknown -show-mc-encoding < %s | FileCheck %s
 
 ; Test that the direct object emission selects the and variant with 8 bit
 ; immediate.
@@ -8,25 +9,38 @@
 
 target triple = "x86_64-pc-linux"
 
-define void @f1() {
+define void @f1() nounwind {
 ; CHECK-LABEL: f1:
-; CHECK: andq    $-32, %rsp              # encoding: [0x48,0x83,0xe4,0xe0]
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    pushq %rbp # encoding: [0x55]
+; CHECK-NEXT:    movq %rsp, %rbp # encoding: [0x48,0x89,0xe5]
+; CHECK-NEXT:    andq $-32, %rsp # encoding: [0x48,0x83,0xe4,0xe0]
+; CHECK-NEXT:    movq %rbp, %rsp # encoding: [0x48,0x89,0xec]
+; CHECK-NEXT:    popq %rbp # encoding: [0x5d]
+; CHECK-NEXT:    retq # encoding: [0xc3]
   %foo = alloca i8, align 32
   ret void
 }
 
-define void @f2(i16 %x, i1 *%y) {
+define void @f2(i16 %x, i1 *%y) nounwind  {
 ; CHECK-LABEL: f2:
-; CHECK: andl	$1, %edi                # encoding: [0x83,0xe7,0x01]
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    andl $1, %edi # encoding: [0x83,0xe7,0x01]
+; CHECK-NEXT:    movb %dil, (%rsi) # encoding: [0x40,0x88,0x3e]
+; CHECK-NEXT:    retq # encoding: [0xc3]
   %c = trunc i16 %x to i1
   store i1 %c, i1* %y
   ret void
 }
 
-define void @f3(i32 %x, i1 *%y) {
+define void @f3(i32 %x, i1 *%y) nounwind {
 ; CHECK-LABEL: f3:
-; CHECK: andl	$1, %edi                # encoding: [0x83,0xe7,0x01]
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    andl $1, %edi # encoding: [0x83,0xe7,0x01]
+; CHECK-NEXT:    movb %dil, (%rsi) # encoding: [0x40,0x88,0x3e]
+; CHECK-NEXT:    retq # encoding: [0xc3]
   %c = trunc i32 %x to i1
   store i1 %c, i1* %y
   ret void
 }
+