[PATCH] D42042: [X86][SSE] Add custom execution domain fixing for BLENDPD/BLENDPS/PBLENDD/PBLENDW (PR34873)

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Sun Jan 14 12:42:24 PST 2018


craig.topper added inline comments.


================
Comment at: lib/Target/X86/X86InstrInfo.cpp:10098
+        if (Subtarget.hasAVX2()) {
+          if (AdjustBlendMask(Imm, ImmWidth, Is256 ? 8 : 4, &NewImm))
+            table = lookup(Opcode, dom, ReplaceableCustomAVX2Instrs);
----------------
RKSimon wrote:
> craig.topper wrote:
> > This doesn't work if we ever start with a BLENDW that could be represented with a BLENDD right? We'd find the BLENDW in the table search and keep that opcode, but give it a BLENDD immediate?
> What should happen is if a PBLENDW mask ends up back here then it can be re-scaled as a PBLENDD, else it'll drop down to PBLENDW again.
But what will change the opcode from PBLENDW to PBLENDD? The table lookup will just hit the original opcode won't it?


Repository:
  rL LLVM

https://reviews.llvm.org/D42042





More information about the llvm-commits mailing list