[PATCH] D42031: [X86] Legalize v32i1 without BWI via splitting to v16i1 rather than the default of promoting to v32i8.

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Sat Jan 13 11:52:50 PST 2018


craig.topper created this revision.

For the most part its better to keep v32i1 as a mask type of a narrower width than trying to promote it to a ymm register.

I had to add some overrides to the methods that get the types for the calling convention so that we still use v32i8 for argument/return purposes.

There are still some regressions in here. I definitely saw some around shuffles. I think we probably should move vXi1 shuffle from lowering to a DAG combine where I think the extend and truncate we have to emit would be better combined.

I think we also need a DAG combine to remove trunc from (extract_vector_elt (trunc))

Overall this removes something like 13000 CHECK lines from lit tests.


Repository:
  rL LLVM

https://reviews.llvm.org/D42031

Files:
  lib/Target/X86/X86ISelLowering.cpp
  lib/Target/X86/X86ISelLowering.h
  test/CodeGen/X86/avg-mask.ll
  test/CodeGen/X86/avx512-ext.ll
  test/CodeGen/X86/avx512-insert-extract.ll
  test/CodeGen/X86/avx512-mask-op.ll
  test/CodeGen/X86/avx512-masked-memop-64-32.ll
  test/CodeGen/X86/avx512-vec-cmp.ll
  test/CodeGen/X86/avx512vl-vec-masked-cmp.ll
  test/CodeGen/X86/bitcast-and-setcc-256.ll
  test/CodeGen/X86/bitcast-and-setcc-512.ll
  test/CodeGen/X86/bitcast-int-to-vector-bool-zext.ll
  test/CodeGen/X86/bitcast-setcc-256.ll
  test/CodeGen/X86/bitcast-setcc-512.ll
  test/CodeGen/X86/vector-compare-results.ll
  test/CodeGen/X86/vector-shuffle-v1.ll





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