[llvm] r322303 - [Hexagon] Fix building 64-bit vector from constant values

Krzysztof Parzyszek via llvm-commits llvm-commits at lists.llvm.org
Thu Jan 11 10:30:41 PST 2018


Author: kparzysz
Date: Thu Jan 11 10:30:41 2018
New Revision: 322303

URL: http://llvm.org/viewvc/llvm-project?rev=322303&view=rev
Log:
[Hexagon] Fix building 64-bit vector from constant values

The constants were aggregated in a reverse order.

Added:
    llvm/trunk/test/CodeGen/Hexagon/vect/build-vect64.ll
Modified:
    llvm/trunk/lib/Target/Hexagon/HexagonISelLowering.cpp

Modified: llvm/trunk/lib/Target/Hexagon/HexagonISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/HexagonISelLowering.cpp?rev=322303&r1=322302&r2=322303&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Hexagon/HexagonISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/Hexagon/HexagonISelLowering.cpp Thu Jan 11 10:30:41 2018
@@ -2652,7 +2652,7 @@ HexagonTargetLowering::buildVector64(Arr
     uint64_t Mask = (ElemTy == MVT::i8)  ? 0xFFull
                   : (ElemTy == MVT::i16) ? 0xFFFFull : 0xFFFFFFFFull;
     for (unsigned i = 0; i != Num; ++i)
-      Val = (Val << W) | (Consts[i]->getZExtValue() & Mask);
+      Val = (Val << W) | (Consts[Num-1-i]->getZExtValue() & Mask);
     SDValue V0 = DAG.getConstant(Val, dl, MVT::i64);
     return DAG.getBitcast(VecTy, V0);
   }

Added: llvm/trunk/test/CodeGen/Hexagon/vect/build-vect64.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Hexagon/vect/build-vect64.ll?rev=322303&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/Hexagon/vect/build-vect64.ll (added)
+++ llvm/trunk/test/CodeGen/Hexagon/vect/build-vect64.ll Thu Jan 11 10:30:41 2018
@@ -0,0 +1,8 @@
+; RUN: llc -march=hexagon < %s | FileCheck %s
+
+; Check that the value produced is 0x0706050403020100.
+; CHECK: r1:0 = CONST64(#506097522914230528)
+
+define <8 x i8> @fred() {
+  ret <8 x i8> <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7>
+}




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