[PATCH] D38128: Handle COPYs of physregs better (regalloc hints)

[Jonas Paulsson via Phabricator via llvm-commits]

jonpa updated this revision to Diff 129076.
jonpa added a comment.

This has been committed, but is still only enabled for SystemZ.

I thought we might try to make progress on enabling this on all targets, so I decided to now do one target at a time.

First out is PowerPC:

CodeGen/PowerPC/licm-tocReg.ll: Updated. Seems to use one instruction (mr) less.
load-two-flts.ll: Updated: Smaller immediate offsets should be better, I hope.
ppc64-byval-align.ll: Updated: One move less, it seems.
select-i1-vs-i1.ll: Updated: a few functions a bit different. If-conversion?

Nemanja?


https://reviews.llvm.org/D38128

Files:
  lib/Target/PowerPC/PPCRegisterInfo.h
  test/CodeGen/PowerPC/licm-tocReg.ll
  test/CodeGen/PowerPC/load-two-flts.ll
  test/CodeGen/PowerPC/ppc64-byval-align.ll
  test/CodeGen/PowerPC/select-i1-vs-i1.ll

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