[PATCH] D41835: [MachineCopyPropagation] Extend pass to do COPY source forwarding

Mon Jan 8 13:15:35 PST 2018

gberry created this revision.
gberry added reviewers: qcolombet, javed.absar, MatzeB, jonpa, tstellar.
Herald added a subscriber: tpr.

This change extends MachineCopyPropagation to do COPY source forwarding
and adds an additional run of the pass to the default pass pipeline just
after register allocation.

This version of this patch uses the newly added
MachineOperand::isRenamable bit to avoid forwarding registers is such a
way as to violate constraints that aren't captured in the
Machine IR (e.g. ABI or ISA constraints).

The AMDGPU target is modified by this change to mark more opcodes as
hasExtraSrcRegAllocReq so that their operands will be marked as not
renamable, to avoid copy forwarding violating the constraint that only
one operand may use the constant bus.

This change is a continuation of the work started in https://reviews.llvm.org/D30751.

https://reviews.llvm.org/D41835

Files:
  lib/CodeGen/MachineCopyPropagation.cpp
  lib/CodeGen/TargetPassConfig.cpp
  lib/Target/AMDGPU/SIInstrFormats.td
  lib/Target/AMDGPU/VOP3Instructions.td
  lib/Target/AMDGPU/VOPInstructions.td
  test/CodeGen/AArch64/aarch64-fold-lslfast.ll
  test/CodeGen/AArch64/arm64-AdvSIMD-Scalar.ll
  test/CodeGen/AArch64/arm64-zero-cycle-regmov.ll
  test/CodeGen/AArch64/cmpxchg-idioms.ll
  test/CodeGen/AArch64/copyprop.mir
  test/CodeGen/AArch64/f16-instructions.ll
  test/CodeGen/AArch64/flags-multiuse.ll
  test/CodeGen/AArch64/ldst-opt.ll
  test/CodeGen/AArch64/merge-store-dependency.ll
  test/CodeGen/AArch64/neg-imm.ll
  test/CodeGen/AMDGPU/callee-special-input-sgprs.ll
  test/CodeGen/AMDGPU/fix-vgpr-copies.mir
  test/CodeGen/AMDGPU/multilevel-break.ll
  test/CodeGen/AMDGPU/ret.ll
  test/CodeGen/AMDGPU/shrink-carry.mir
  test/CodeGen/AMDGPU/stack-slot-color-sgpr-vgpr-spills.mir
  test/CodeGen/ARM/atomic-op.ll
  test/CodeGen/ARM/intrinsics-overflow.ll
  test/CodeGen/ARM/select-imm.ll
  test/CodeGen/ARM/su-addsub-overflow.ll
  test/CodeGen/ARM/swifterror.ll
  test/CodeGen/Mips/llvm-ir/ashr.ll
  test/CodeGen/Mips/llvm-ir/lshr.ll
  test/CodeGen/Mips/llvm-ir/shl.ll
  test/CodeGen/Mips/llvm-ir/sub.ll
  test/CodeGen/PowerPC/MCSE-caller-preserved-reg.ll
  test/CodeGen/PowerPC/fma-mutate.ll
  test/CodeGen/PowerPC/gpr-vsr-spill.ll
  test/CodeGen/PowerPC/licm-remat.ll
  test/CodeGen/PowerPC/opt-li-add-to-addi.ll
  test/CodeGen/PowerPC/tail-dup-layout.ll
  test/CodeGen/SPARC/32abi.ll
  test/CodeGen/SPARC/atomics.ll
  test/CodeGen/SystemZ/vec-sub-01.ll
  test/CodeGen/Thumb/thumb-shrink-wrapping.ll
  test/CodeGen/X86/2006-03-01-InstrSchedBug.ll
  test/CodeGen/X86/arg-copy-elide.ll
  test/CodeGen/X86/avx-load-store.ll
  test/CodeGen/X86/avx512-bugfix-25270.ll
  test/CodeGen/X86/avx512-calling-conv.ll
  test/CodeGen/X86/avx512-regcall-NoMask.ll
  test/CodeGen/X86/avx512bw-intrinsics-upgrade.ll
  test/CodeGen/X86/buildvec-insertvec.ll
  test/CodeGen/X86/combine-fcopysign.ll
  test/CodeGen/X86/combine-shl.ll
  test/CodeGen/X86/complex-fastmath.ll
  test/CodeGen/X86/divide-by-constant.ll
  test/CodeGen/X86/fmaxnum.ll
  test/CodeGen/X86/fmf-flags.ll
  test/CodeGen/X86/fminnum.ll
  test/CodeGen/X86/fp128-i128.ll
  test/CodeGen/X86/h-registers-1.ll
  test/CodeGen/X86/haddsub-2.ll
  test/CodeGen/X86/haddsub-undef.ll
  test/CodeGen/X86/half.ll
  test/CodeGen/X86/horizontal-reduce-smax.ll
  test/CodeGen/X86/horizontal-reduce-smin.ll
  test/CodeGen/X86/horizontal-reduce-umax.ll
  test/CodeGen/X86/horizontal-reduce-umin.ll
  test/CodeGen/X86/inline-asm-fpstack.ll
  test/CodeGen/X86/ipra-local-linkage.ll
  test/CodeGen/X86/localescape.ll
  test/CodeGen/X86/machine-cp.ll
  test/CodeGen/X86/mul-i1024.ll
  test/CodeGen/X86/mul-i256.ll
  test/CodeGen/X86/mul-i512.ll
  test/CodeGen/X86/mul128.ll
  test/CodeGen/X86/mulvi32.ll
  test/CodeGen/X86/pmul.ll
  test/CodeGen/X86/powi.ll
  test/CodeGen/X86/pr11334.ll
  test/CodeGen/X86/pr29112.ll
  test/CodeGen/X86/pr34080-2.ll
  test/CodeGen/X86/psubus.ll
  test/CodeGen/X86/scalar_widen_div.ll
  test/CodeGen/X86/select.ll
  test/CodeGen/X86/shrink-wrap-chkstk.ll
  test/CodeGen/X86/sqrt-fastmath.ll
  test/CodeGen/X86/sse-scalar-fp-arith.ll
  test/CodeGen/X86/sse1.ll
  test/CodeGen/X86/sse3-avx-addsub-2.ll
  test/CodeGen/X86/statepoint-live-in.ll
  test/CodeGen/X86/statepoint-stack-usage.ll
  test/CodeGen/X86/vec_fp_to_int.ll
  test/CodeGen/X86/vec_int_to_fp.ll
  test/CodeGen/X86/vec_minmax_sint.ll
  test/CodeGen/X86/vec_shift4.ll
  test/CodeGen/X86/vector-blend.ll
  test/CodeGen/X86/vector-idiv-sdiv-128.ll
  test/CodeGen/X86/vector-idiv-udiv-128.ll
  test/CodeGen/X86/vector-mul.ll
  test/CodeGen/X86/vector-rotate-128.ll
  test/CodeGen/X86/vector-sext.ll
  test/CodeGen/X86/vector-shift-ashr-128.ll
  test/CodeGen/X86/vector-shift-lshr-128.ll
  test/CodeGen/X86/vector-shift-shl-128.ll
  test/CodeGen/X86/vector-shuffle-combining.ll
  test/CodeGen/X86/vector-trunc-math.ll
  test/CodeGen/X86/vector-zext.ll
  test/CodeGen/X86/vselect-minmax.ll
  test/CodeGen/X86/widen_conv-3.ll
  test/CodeGen/X86/widen_conv-4.ll
  test/CodeGen/X86/x86-interleaved-access.ll
  test/CodeGen/X86/x86-shrink-wrap-unwind.ll
  test/CodeGen/X86/x86-shrink-wrapping.ll
  test/DebugInfo/COFF/fpo-shrink-wrap.ll
  test/DebugInfo/X86/spill-nospill.ll

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