[PATCH] D41772: [AArch64] optimise v4f16 FCMPs to utilise vector instructions

[Carey Williams via Phabricator via llvm-commits]

carwil created this revision.
carwil added a reviewer: SjoerdMeijer.
Herald added subscribers: kristof.beyls, javed.absar, rengolin, aemerson.

Improves the code generation for v4f16 FCMP instructions when FullFP16 is not supported by generating FCTVL(s) rather than a longer series of FCVTs.


https://reviews.llvm.org/D41772

Files:
  lib/Target/AArch64/AArch64ISelLowering.cpp
  test/CodeGen/AArch64/fp16-v4-instructions.ll

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