[PATCH] D40961: [ARM] Fix PR35481

Eli Friedman via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Jan 3 14:07:29 PST 2018


efriedma accepted this revision.
efriedma added a comment.
This revision is now accepted and ready to land.

LGTM.



================
Comment at: lib/Target/ARM/Thumb1FrameLowering.cpp:618
+  if (STI.useR7AsFramePointer())
+    PopFriendly.set(ARM::R7);
+
----------------
chill wrote:
> chill wrote:
> > efriedma wrote:
> > > If you want exactly the set r0...r7, shouldn't you just set that, rather than getting the set of allocatable registers and adding back specific registers?  That would simplify the code a bit because findTemporariesForLR would be guaranteed to succeed.
> > I'd prefer to not depend (or depends less) on which registers are considered allocatable and contain this decision in `ARMBaseRegisterInfo::getReservedRegs` - to deal with platform specific conventions, possible future options like GCC's `-ffixed-reg-N`, etc.
> > That said, I'd like to add back in a similar manner r6/BasePtr.
> > That said, I'd like to add back in a similar manner r6/BasePtr.
> I wasn't able to produce a testcase which would take advantage of having a reserved r6 in that set, so I'll
> leave it as is.
> 
> 
Okay.


https://reviews.llvm.org/D40961





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