[llvm] r321655 - [AArch64][GlobalISel] Enable GlobalISel at -O0 by default
Evgenii Stepanov via llvm-commits
llvm-commits at lists.llvm.org
Wed Jan 3 11:09:01 PST 2018
Bots seem happy with the fix. Thank you!
On Tue, Jan 2, 2018 at 9:06 PM, Amara Emerson <aemerson at apple.com> wrote:
> I’ve committed r321690 which seems to fix the reproducer you very helpfully provided, hopefully that will satisfy the bots.
>
> Cheers,
> Amara
>
>> On 3 Jan 2018, at 00:10, Amara Emerson <aemerson at apple.com> wrote:
>>
>> Thanks, I’m taking a look now.
>>
>> Amara
>>
>>> On 2 Jan 2018, at 23:42, Evgenii Stepanov <eugeni.stepanov at gmail.com> wrote:
>>>
>>> Hi,
>>>
>>> this broke UBSan on AArch64 due to https://bugs.llvm.org/show_bug.cgi?id=35800
>>>
>>> Would you mind taking a look?
>>>
>>> On Tue, Jan 2, 2018 at 8:30 AM, Amara Emerson via llvm-commits
>>> <llvm-commits at lists.llvm.org> wrote:
>>>> Author: aemerson
>>>> Date: Tue Jan 2 08:30:47 2018
>>>> New Revision: 321655
>>>>
>>>> URL: http://llvm.org/viewvc/llvm-project?rev=321655&view=rev
>>>> Log:
>>>> [AArch64][GlobalISel] Enable GlobalISel at -O0 by default
>>>>
>>>> Tests updated to explicitly use fast-isel at -O0 instead of implicitly.
>>>>
>>>> This change also allows an explicit -fast-isel option to override an
>>>> implicitly enabled global-isel. Otherwise -fast-isel would have no effect at -O0.
>>>>
>>>> Differential Revision: https://reviews.llvm.org/D41362
>>>>
>>>> Modified:
>>>> llvm/trunk/include/llvm/CodeGen/TargetPassConfig.h
>>>> llvm/trunk/lib/CodeGen/TargetPassConfig.cpp
>>>> llvm/trunk/lib/Target/AArch64/AArch64TargetMachine.cpp
>>>> llvm/trunk/test/CodeGen/AArch64/GlobalISel/arm64-fallback.ll
>>>> llvm/trunk/test/CodeGen/AArch64/GlobalISel/gisel-commandline-option.ll
>>>> llvm/trunk/test/CodeGen/AArch64/aarch64_f16_be.ll
>>>> llvm/trunk/test/CodeGen/AArch64/and-mask-removal.ll
>>>> llvm/trunk/test/CodeGen/AArch64/arm64-EXT-undef-mask.ll
>>>> llvm/trunk/test/CodeGen/AArch64/arm64-abi.ll
>>>> llvm/trunk/test/CodeGen/AArch64/arm64-abi_align.ll
>>>> llvm/trunk/test/CodeGen/AArch64/arm64-elf-constpool.ll
>>>> llvm/trunk/test/CodeGen/AArch64/arm64-elf-globals.ll
>>>> llvm/trunk/test/CodeGen/AArch64/arm64-fast-isel-alloca.ll
>>>> llvm/trunk/test/CodeGen/AArch64/arm64-fast-isel-br.ll
>>>> llvm/trunk/test/CodeGen/AArch64/arm64-fast-isel-call.ll
>>>> llvm/trunk/test/CodeGen/AArch64/arm64-fast-isel-conversion-fallback.ll
>>>> llvm/trunk/test/CodeGen/AArch64/arm64-fast-isel-conversion.ll
>>>> llvm/trunk/test/CodeGen/AArch64/arm64-fast-isel-fcmp.ll
>>>> llvm/trunk/test/CodeGen/AArch64/arm64-fast-isel-gv.ll
>>>> llvm/trunk/test/CodeGen/AArch64/arm64-fast-isel-icmp.ll
>>>> llvm/trunk/test/CodeGen/AArch64/arm64-fast-isel-intrinsic.ll
>>>> llvm/trunk/test/CodeGen/AArch64/arm64-fast-isel-materialize.ll
>>>> llvm/trunk/test/CodeGen/AArch64/arm64-fast-isel-noconvert.ll
>>>> llvm/trunk/test/CodeGen/AArch64/arm64-fast-isel-rem.ll
>>>> llvm/trunk/test/CodeGen/AArch64/arm64-fast-isel-ret.ll
>>>> llvm/trunk/test/CodeGen/AArch64/arm64-fast-isel.ll
>>>> llvm/trunk/test/CodeGen/AArch64/arm64-simd-scalar-to-vector.ll
>>>> llvm/trunk/test/CodeGen/AArch64/arm64-tls-dynamic-together.ll
>>>> llvm/trunk/test/CodeGen/AArch64/arm64-vcvt_f.ll
>>>> llvm/trunk/test/CodeGen/AArch64/br-cond-not-merge.ll
>>>> llvm/trunk/test/CodeGen/AArch64/cmpxchg-O0.ll
>>>> llvm/trunk/test/CodeGen/AArch64/cxx-tlscc.ll
>>>> llvm/trunk/test/CodeGen/AArch64/fast-isel-atomic.ll
>>>> llvm/trunk/test/CodeGen/AArch64/fast-isel-sp-adjust.ll
>>>> llvm/trunk/test/CodeGen/AArch64/i128-fast-isel-fallback.ll
>>>> llvm/trunk/test/CodeGen/AArch64/preferred-alignment.ll
>>>> llvm/trunk/test/CodeGen/AArch64/swift-return.ll
>>>> llvm/trunk/test/CodeGen/AArch64/swifterror.ll
>>>> llvm/trunk/test/CodeGen/AArch64/swiftself.ll
>>>> llvm/trunk/test/CodeGen/AArch64/tailcall-fastisel.ll
>>>> llvm/trunk/test/DebugInfo/AArch64/asan-stack-vars.ll
>>>> llvm/trunk/test/DebugInfo/AArch64/frameindices.ll
>>>> llvm/trunk/test/DebugInfo/AArch64/line-header.ll
>>>> llvm/trunk/test/DebugInfo/AArch64/prologue_end.ll
>>>>
>>>> Modified: llvm/trunk/include/llvm/CodeGen/TargetPassConfig.h
>>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/TargetPassConfig.h?rev=321655&r1=321654&r2=321655&view=diff
>>>> ==============================================================================
>>>> --- llvm/trunk/include/llvm/CodeGen/TargetPassConfig.h (original)
>>>> +++ llvm/trunk/include/llvm/CodeGen/TargetPassConfig.h Tue Jan 2 08:30:47 2018
>>>> @@ -325,9 +325,9 @@ public:
>>>> virtual bool isGlobalISelEnabled() const;
>>>>
>>>> /// Check whether or not GlobalISel should abort on error.
>>>> - /// When this is disable, GlobalISel will fall back on SDISel instead of
>>>> + /// When this is disabled, GlobalISel will fall back on SDISel instead of
>>>> /// erroring out.
>>>> - virtual bool isGlobalISelAbortEnabled() const;
>>>> + bool isGlobalISelAbortEnabled() const;
>>>>
>>>> /// Check whether or not a diagnostic should be emitted when GlobalISel
>>>> /// uses the fallback path. In other words, it will emit a diagnostic
>>>>
>>>> Modified: llvm/trunk/lib/CodeGen/TargetPassConfig.cpp
>>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/TargetPassConfig.cpp?rev=321655&r1=321654&r2=321655&view=diff
>>>> ==============================================================================
>>>> --- llvm/trunk/lib/CodeGen/TargetPassConfig.cpp (original)
>>>> +++ llvm/trunk/lib/CodeGen/TargetPassConfig.cpp Tue Jan 2 08:30:47 2018
>>>> @@ -712,8 +712,11 @@ bool TargetPassConfig::addCoreISelPasses
>>>>
>>>> // Ask the target for an isel.
>>>> // Enable GlobalISel if the target wants to, but allow that to be overriden.
>>>> + // Explicitly enabling fast-isel should override implicitly enabled
>>>> + // global-isel.
>>>> if (EnableGlobalISel == cl::BOU_TRUE ||
>>>> - (EnableGlobalISel == cl::BOU_UNSET && isGlobalISelEnabled())) {
>>>> + (EnableGlobalISel == cl::BOU_UNSET && isGlobalISelEnabled() &&
>>>> + EnableFastISelOption != cl::BOU_TRUE)) {
>>>> if (addIRTranslator())
>>>> return true;
>>>>
>>>> @@ -1133,7 +1136,12 @@ bool TargetPassConfig::isGlobalISelEnabl
>>>> }
>>>>
>>>> bool TargetPassConfig::isGlobalISelAbortEnabled() const {
>>>> - return EnableGlobalISelAbort == 1;
>>>> + if (EnableGlobalISelAbort.getNumOccurrences() > 0)
>>>> + return EnableGlobalISelAbort == 1;
>>>> +
>>>> + // When no abort behaviour is specified, we don't abort if the target says
>>>> + // that GISel is enabled.
>>>> + return !isGlobalISelEnabled();
>>>> }
>>>>
>>>> bool TargetPassConfig::reportDiagnosticWhenGlobalISelFallback() const {
>>>>
>>>> Modified: llvm/trunk/lib/Target/AArch64/AArch64TargetMachine.cpp
>>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64TargetMachine.cpp?rev=321655&r1=321654&r2=321655&view=diff
>>>> ==============================================================================
>>>> --- llvm/trunk/lib/Target/AArch64/AArch64TargetMachine.cpp (original)
>>>> +++ llvm/trunk/lib/Target/AArch64/AArch64TargetMachine.cpp Tue Jan 2 08:30:47 2018
>>>> @@ -136,7 +136,7 @@ static cl::opt<bool>
>>>> static cl::opt<int> EnableGlobalISelAtO(
>>>> "aarch64-enable-global-isel-at-O", cl::Hidden,
>>>> cl::desc("Enable GlobalISel at or below an opt level (-1 to disable)"),
>>>> - cl::init(-1));
>>>> + cl::init(0));
>>>>
>>>> static cl::opt<bool> EnableFalkorHWPFFix("aarch64-enable-falkor-hwpf-fix",
>>>> cl::init(true), cl::Hidden);
>>>>
>>>> Modified: llvm/trunk/test/CodeGen/AArch64/GlobalISel/arm64-fallback.ll
>>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/GlobalISel/arm64-fallback.ll?rev=321655&r1=321654&r2=321655&view=diff
>>>> ==============================================================================
>>>> --- llvm/trunk/test/CodeGen/AArch64/GlobalISel/arm64-fallback.ll (original)
>>>> +++ llvm/trunk/test/CodeGen/AArch64/GlobalISel/arm64-fallback.ll Tue Jan 2 08:30:47 2018
>>>> @@ -1,4 +1,4 @@
>>>> -; RUN: not llc -O0 -global-isel -verify-machineinstrs %s -o - 2>&1 | FileCheck %s --check-prefix=ERROR
>>>> +; RUN: not llc -O0 -global-isel -global-isel-abort=1 -verify-machineinstrs %s -o - 2>&1 | FileCheck %s --check-prefix=ERROR
>>>> ; RUN: llc -O0 -global-isel -global-isel-abort=0 -verify-machineinstrs %s -o - 2>&1 | FileCheck %s --check-prefix=FALLBACK
>>>> ; RUN: llc -O0 -global-isel -global-isel-abort=2 -pass-remarks-missed='gisel*' -verify-machineinstrs %s -o %t.out 2> %t.err
>>>> ; RUN: FileCheck %s --check-prefix=FALLBACK-WITH-REPORT-OUT < %t.out
>>>>
>>>> Modified: llvm/trunk/test/CodeGen/AArch64/GlobalISel/gisel-commandline-option.ll
>>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/GlobalISel/gisel-commandline-option.ll?rev=321655&r1=321654&r2=321655&view=diff
>>>> ==============================================================================
>>>> --- llvm/trunk/test/CodeGen/AArch64/GlobalISel/gisel-commandline-option.ll (original)
>>>> +++ llvm/trunk/test/CodeGen/AArch64/GlobalISel/gisel-commandline-option.ll Tue Jan 2 08:30:47 2018
>>>> @@ -1,5 +1,8 @@
>>>> ; RUN: llc -mtriple=aarch64-- -debug-pass=Structure %s -o /dev/null 2>&1 \
>>>> -; RUN: -O0 -aarch64-enable-global-isel-at-O=0 \
>>>> +; RUN: -O0 | FileCheck %s --check-prefix ENABLED --check-prefix ENABLED-O0 --check-prefix FALLBACK
>>>> +
>>>> +; RUN: llc -mtriple=aarch64-- -debug-pass=Structure %s -o /dev/null 2>&1 \
>>>> +; RUN: -O0 -aarch64-enable-global-isel-at-O=0 -global-isel-abort=1 \
>>>> ; RUN: | FileCheck %s --check-prefix ENABLED --check-prefix ENABLED-O0 --check-prefix NOFALLBACK
>>>>
>>>> ; RUN: llc -mtriple=aarch64-- -debug-pass=Structure %s -o /dev/null 2>&1 \
>>>>
>>>> Modified: llvm/trunk/test/CodeGen/AArch64/aarch64_f16_be.ll
>>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/aarch64_f16_be.ll?rev=321655&r1=321654&r2=321655&view=diff
>>>> ==============================================================================
>>>> --- llvm/trunk/test/CodeGen/AArch64/aarch64_f16_be.ll (original)
>>>> +++ llvm/trunk/test/CodeGen/AArch64/aarch64_f16_be.ll Tue Jan 2 08:30:47 2018
>>>> @@ -1,5 +1,5 @@
>>>> -; RUN: llc -mtriple=aarch64-linux-gnuabi -O0 < %s | FileCheck %s
>>>> -; RUN: llc -mtriple=aarch64_be-linux-gnuabi -O0 < %s | FileCheck %s --check-prefix=CHECK-BE
>>>> +; RUN: llc -mtriple=aarch64-linux-gnuabi -O0 -fast-isel < %s | FileCheck %s
>>>> +; RUN: llc -mtriple=aarch64_be-linux-gnuabi -O0 -fast-isel < %s | FileCheck %s --check-prefix=CHECK-BE
>>>>
>>>> define void @test_bitcast_v8f16_to_v4f32(<8 x half> %a) {
>>>> ; CHECK-LABEL: test_bitcast_v8f16_to_v4f32:
>>>>
>>>> Modified: llvm/trunk/test/CodeGen/AArch64/and-mask-removal.ll
>>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/and-mask-removal.ll?rev=321655&r1=321654&r2=321655&view=diff
>>>> ==============================================================================
>>>> --- llvm/trunk/test/CodeGen/AArch64/and-mask-removal.ll (original)
>>>> +++ llvm/trunk/test/CodeGen/AArch64/and-mask-removal.ll Tue Jan 2 08:30:47 2018
>>>> @@ -1,4 +1,4 @@
>>>> -; RUN: llc -O0 -fast-isel=false -mtriple=arm64-apple-darwin < %s | FileCheck %s
>>>> +; RUN: llc -mtriple=arm64-apple-darwin < %s | FileCheck %s
>>>>
>>>> @board = common global [400 x i8] zeroinitializer, align 1
>>>> @next_string = common global i32 0, align 4
>>>>
>>>> Modified: llvm/trunk/test/CodeGen/AArch64/arm64-EXT-undef-mask.ll
>>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/arm64-EXT-undef-mask.ll?rev=321655&r1=321654&r2=321655&view=diff
>>>> ==============================================================================
>>>> --- llvm/trunk/test/CodeGen/AArch64/arm64-EXT-undef-mask.ll (original)
>>>> +++ llvm/trunk/test/CodeGen/AArch64/arm64-EXT-undef-mask.ll Tue Jan 2 08:30:47 2018
>>>> @@ -1,4 +1,4 @@
>>>> -; RUN: llc -O0 -mtriple=arm64-eabi -aarch64-neon-syntax=apple -verify-machineinstrs < %s | FileCheck %s
>>>> +; RUN: llc -mtriple=arm64-eabi -aarch64-neon-syntax=apple -verify-machineinstrs < %s | FileCheck %s
>>>>
>>>> ; The following 2 test cases test shufflevector with beginning UNDEF mask.
>>>> define <8 x i16> @test_vext_undef_traverse(<8 x i16> %in) {
>>>>
>>>> Modified: llvm/trunk/test/CodeGen/AArch64/arm64-abi.ll
>>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/arm64-abi.ll?rev=321655&r1=321654&r2=321655&view=diff
>>>> ==============================================================================
>>>> --- llvm/trunk/test/CodeGen/AArch64/arm64-abi.ll (original)
>>>> +++ llvm/trunk/test/CodeGen/AArch64/arm64-abi.ll Tue Jan 2 08:30:47 2018
>>>> @@ -1,5 +1,5 @@
>>>> ; RUN: llc -mtriple=arm64-apple-darwin -mcpu=cyclone -enable-misched=false < %s | FileCheck %s
>>>> -; RUN: llc -O0 -mtriple=arm64-apple-darwin < %s | FileCheck --check-prefix=FAST %s
>>>> +; RUN: llc -O0 -fast-isel -mtriple=arm64-apple-darwin < %s | FileCheck --check-prefix=FAST %s
>>>>
>>>> ; rdar://9932559
>>>> define i64 @i8i16callee(i64 %a1, i64 %a2, i64 %a3, i8 signext %a4, i16 signext %a5, i64 %a6, i64 %a7, i64 %a8, i8 signext %b1, i16 signext %b2, i8 signext %b3, i8 signext %b4) nounwind readnone noinline {
>>>>
>>>> Modified: llvm/trunk/test/CodeGen/AArch64/arm64-abi_align.ll
>>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/arm64-abi_align.ll?rev=321655&r1=321654&r2=321655&view=diff
>>>> ==============================================================================
>>>> --- llvm/trunk/test/CodeGen/AArch64/arm64-abi_align.ll (original)
>>>> +++ llvm/trunk/test/CodeGen/AArch64/arm64-abi_align.ll Tue Jan 2 08:30:47 2018
>>>> @@ -1,5 +1,5 @@
>>>> ; RUN: llc < %s -mtriple=arm64-apple-darwin -mcpu=cyclone -enable-misched=false -disable-fp-elim | FileCheck %s
>>>> -; RUN: llc < %s -mtriple=arm64-apple-darwin -O0 -disable-fp-elim | FileCheck -check-prefix=FAST %s
>>>> +; RUN: llc < %s -mtriple=arm64-apple-darwin -O0 -disable-fp-elim -fast-isel | FileCheck -check-prefix=FAST %s
>>>>
>>>> ; rdar://12648441
>>>> ; Generated from arm64-arguments.c with -O2.
>>>>
>>>> Modified: llvm/trunk/test/CodeGen/AArch64/arm64-elf-constpool.ll
>>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/arm64-elf-constpool.ll?rev=321655&r1=321654&r2=321655&view=diff
>>>> ==============================================================================
>>>> --- llvm/trunk/test/CodeGen/AArch64/arm64-elf-constpool.ll (original)
>>>> +++ llvm/trunk/test/CodeGen/AArch64/arm64-elf-constpool.ll Tue Jan 2 08:30:47 2018
>>>> @@ -1,5 +1,5 @@
>>>> ; RUN: llc -mtriple=arm64-linux-gnu -o - %s | FileCheck %s
>>>> -; RUN: llc -mtriple=arm64-linux-gnu -O0 -o - %s | FileCheck %s
>>>> +; RUN: llc -mtriple=arm64-linux-gnu -O0 -fast-isel -o - %s | FileCheck %s
>>>>
>>>> ; O0 checked for fastisel purposes. It has a separate path which
>>>> ; creates a constpool entry for floating values.
>>>>
>>>> Modified: llvm/trunk/test/CodeGen/AArch64/arm64-elf-globals.ll
>>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/arm64-elf-globals.ll?rev=321655&r1=321654&r2=321655&view=diff
>>>> ==============================================================================
>>>> --- llvm/trunk/test/CodeGen/AArch64/arm64-elf-globals.ll (original)
>>>> +++ llvm/trunk/test/CodeGen/AArch64/arm64-elf-globals.ll Tue Jan 2 08:30:47 2018
>>>> @@ -1,11 +1,11 @@
>>>> ; RUN: llc -mtriple=arm64-linux-gnu -o - %s -mcpu=cyclone | FileCheck %s
>>>> -; RUN: llc -mtriple=arm64-linux-gnu -o - %s -O0 -mcpu=cyclone | FileCheck %s --check-prefix=CHECK-FAST
>>>> +; RUN: llc -mtriple=arm64-linux-gnu -o - %s -O0 -fast-isel -mcpu=cyclone | FileCheck %s --check-prefix=CHECK-FAST
>>>> ; RUN: llc -mtriple=arm64-linux-gnu -relocation-model=pic -o - %s -mcpu=cyclone | FileCheck %s --check-prefix=CHECK-PIC
>>>> -; RUN: llc -mtriple=arm64-linux-gnu -O0 -relocation-model=pic -o - %s -mcpu=cyclone | FileCheck %s --check-prefix=CHECK-FAST-PIC
>>>> +; RUN: llc -mtriple=arm64-linux-gnu -O0 -fast-isel -relocation-model=pic -o - %s -mcpu=cyclone | FileCheck %s --check-prefix=CHECK-FAST-PIC
>>>> ; RUN: llc -mtriple=aarch64-fuchsia -code-model=kernel -o - %s -mcpu=cyclone | FileCheck %s
>>>> -; RUN: llc -mtriple=aarch64-fuchsia -code-model=kernel -o - %s -O0 -mcpu=cyclone | FileCheck %s --check-prefix=CHECK-FAST
>>>> +; RUN: llc -mtriple=aarch64-fuchsia -code-model=kernel -o - %s -O0 -fast-isel -mcpu=cyclone | FileCheck %s --check-prefix=CHECK-FAST
>>>> ; RUN: llc -mtriple=aarch64-fuchsia -code-model=kernel -relocation-model=pic -o - %s -mcpu=cyclone | FileCheck %s --check-prefix=CHECK-PIC
>>>> -; RUN: llc -mtriple=aarch64-fuchsia -code-model=kernel -O0 -relocation-model=pic -o - %s -mcpu=cyclone | FileCheck %s --check-prefix=CHECK-FAST-PIC
>>>> +; RUN: llc -mtriple=aarch64-fuchsia -code-model=kernel -O0 -fast-isel -relocation-model=pic -o - %s -mcpu=cyclone | FileCheck %s --check-prefix=CHECK-FAST-PIC
>>>>
>>>> @var8 = external global i8, align 1
>>>> @var16 = external global i16, align 2
>>>>
>>>> Modified: llvm/trunk/test/CodeGen/AArch64/arm64-fast-isel-alloca.ll
>>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/arm64-fast-isel-alloca.ll?rev=321655&r1=321654&r2=321655&view=diff
>>>> ==============================================================================
>>>> --- llvm/trunk/test/CodeGen/AArch64/arm64-fast-isel-alloca.ll (original)
>>>> +++ llvm/trunk/test/CodeGen/AArch64/arm64-fast-isel-alloca.ll Tue Jan 2 08:30:47 2018
>>>> @@ -1,5 +1,5 @@
>>>> ; This test should cause the TargetMaterializeAlloca to be invoked
>>>> -; RUN: llc -O0 -fast-isel-abort=1 -verify-machineinstrs -mtriple=arm64-apple-darwin -disable-fp-elim < %s | FileCheck %s
>>>> +; RUN: llc -O0 -fast-isel -fast-isel-abort=1 -verify-machineinstrs -mtriple=arm64-apple-darwin -disable-fp-elim < %s | FileCheck %s
>>>>
>>>> %struct.S1Ty = type { i64 }
>>>> %struct.S2Ty = type { %struct.S1Ty, %struct.S1Ty }
>>>>
>>>> Modified: llvm/trunk/test/CodeGen/AArch64/arm64-fast-isel-br.ll
>>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/arm64-fast-isel-br.ll?rev=321655&r1=321654&r2=321655&view=diff
>>>> ==============================================================================
>>>> --- llvm/trunk/test/CodeGen/AArch64/arm64-fast-isel-br.ll (original)
>>>> +++ llvm/trunk/test/CodeGen/AArch64/arm64-fast-isel-br.ll Tue Jan 2 08:30:47 2018
>>>> @@ -1,4 +1,4 @@
>>>> -; RUN: llc -O0 -fast-isel-abort=1 -mtriple=arm64-apple-darwin -mcpu=cyclone -verify-machineinstrs < %s | FileCheck %s
>>>> +; RUN: llc -O0 -fast-isel -fast-isel-abort=1 -mtriple=arm64-apple-darwin -mcpu=cyclone -verify-machineinstrs < %s | FileCheck %s
>>>>
>>>> define void @branch1() nounwind uwtable ssp {
>>>> %x = alloca i32, align 4
>>>>
>>>> Modified: llvm/trunk/test/CodeGen/AArch64/arm64-fast-isel-call.ll
>>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/arm64-fast-isel-call.ll?rev=321655&r1=321654&r2=321655&view=diff
>>>> ==============================================================================
>>>> --- llvm/trunk/test/CodeGen/AArch64/arm64-fast-isel-call.ll (original)
>>>> +++ llvm/trunk/test/CodeGen/AArch64/arm64-fast-isel-call.ll Tue Jan 2 08:30:47 2018
>>>> @@ -1,6 +1,6 @@
>>>> -; RUN: llc -O0 -fast-isel-abort=2 -code-model=small -verify-machineinstrs -disable-fp-elim -mtriple=arm64-apple-darwin < %s | FileCheck %s
>>>> -; RUN: llc -O0 -fast-isel-abort=2 -code-model=large -verify-machineinstrs -disable-fp-elim -mtriple=arm64-apple-darwin < %s | FileCheck %s --check-prefix=LARGE
>>>> -; RUN: llc -O0 -fast-isel-abort=2 -code-model=small -verify-machineinstrs -disable-fp-elim -mtriple=aarch64_be-linux-gnu < %s | FileCheck %s --check-prefix=CHECK-BE
>>>> +; RUN: llc -O0 -fast-isel -fast-isel-abort=2 -code-model=small -verify-machineinstrs -disable-fp-elim -mtriple=arm64-apple-darwin < %s | FileCheck %s
>>>> +; RUN: llc -O0 -fast-isel -fast-isel-abort=2 -code-model=large -verify-machineinstrs -disable-fp-elim -mtriple=arm64-apple-darwin < %s | FileCheck %s --check-prefix=LARGE
>>>> +; RUN: llc -O0 -fast-isel -fast-isel-abort=2 -code-model=small -verify-machineinstrs -disable-fp-elim -mtriple=aarch64_be-linux-gnu < %s | FileCheck %s --check-prefix=CHECK-BE
>>>>
>>>> define void @call0() nounwind {
>>>> entry:
>>>>
>>>> Modified: llvm/trunk/test/CodeGen/AArch64/arm64-fast-isel-conversion-fallback.ll
>>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/arm64-fast-isel-conversion-fallback.ll?rev=321655&r1=321654&r2=321655&view=diff
>>>> ==============================================================================
>>>> --- llvm/trunk/test/CodeGen/AArch64/arm64-fast-isel-conversion-fallback.ll (original)
>>>> +++ llvm/trunk/test/CodeGen/AArch64/arm64-fast-isel-conversion-fallback.ll Tue Jan 2 08:30:47 2018
>>>> @@ -1,4 +1,4 @@
>>>> -; RUN: llc -O0 -verify-machineinstrs -mtriple=arm64-eabi < %s | FileCheck --enable-var-scope %s
>>>> +; RUN: llc -O0 -fast-isel -verify-machineinstrs -mtriple=arm64-eabi < %s | FileCheck --enable-var-scope %s
>>>>
>>>> ; Test fptosi
>>>> define i32 @fptosi_wh(half %a) nounwind ssp {
>>>>
>>>> Modified: llvm/trunk/test/CodeGen/AArch64/arm64-fast-isel-conversion.ll
>>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/arm64-fast-isel-conversion.ll?rev=321655&r1=321654&r2=321655&view=diff
>>>> ==============================================================================
>>>> --- llvm/trunk/test/CodeGen/AArch64/arm64-fast-isel-conversion.ll (original)
>>>> +++ llvm/trunk/test/CodeGen/AArch64/arm64-fast-isel-conversion.ll Tue Jan 2 08:30:47 2018
>>>> @@ -1,4 +1,4 @@
>>>> -; RUN: llc -O0 -fast-isel-abort=1 -verify-machineinstrs -mtriple=arm64-apple-darwin -mcpu=cyclone < %s | FileCheck %s
>>>> +; RUN: llc -O0 -fast-isel -fast-isel-abort=1 -verify-machineinstrs -mtriple=arm64-apple-darwin -mcpu=cyclone < %s | FileCheck %s
>>>>
>>>> ;; Test various conversions.
>>>> define zeroext i32 @trunc_(i8 zeroext %a, i16 zeroext %b, i32 %c, i64 %d) nounwind ssp {
>>>>
>>>> Modified: llvm/trunk/test/CodeGen/AArch64/arm64-fast-isel-fcmp.ll
>>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/arm64-fast-isel-fcmp.ll?rev=321655&r1=321654&r2=321655&view=diff
>>>> ==============================================================================
>>>> --- llvm/trunk/test/CodeGen/AArch64/arm64-fast-isel-fcmp.ll (original)
>>>> +++ llvm/trunk/test/CodeGen/AArch64/arm64-fast-isel-fcmp.ll Tue Jan 2 08:30:47 2018
>>>> @@ -1,4 +1,4 @@
>>>> -; RUN: llc -O0 -fast-isel-abort=1 -verify-machineinstrs -mtriple=arm64-apple-darwin < %s | FileCheck %s
>>>> +; RUN: llc -O0 -fast-isel -fast-isel-abort=1 -verify-machineinstrs -mtriple=arm64-apple-darwin < %s | FileCheck %s
>>>>
>>>> define zeroext i1 @fcmp_float1(float %a) {
>>>> ; CHECK-LABEL: fcmp_float1
>>>>
>>>> Modified: llvm/trunk/test/CodeGen/AArch64/arm64-fast-isel-gv.ll
>>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/arm64-fast-isel-gv.ll?rev=321655&r1=321654&r2=321655&view=diff
>>>> ==============================================================================
>>>> --- llvm/trunk/test/CodeGen/AArch64/arm64-fast-isel-gv.ll (original)
>>>> +++ llvm/trunk/test/CodeGen/AArch64/arm64-fast-isel-gv.ll Tue Jan 2 08:30:47 2018
>>>> @@ -1,4 +1,4 @@
>>>> -; RUN: llc -O0 -fast-isel-abort=1 -verify-machineinstrs -mtriple=arm64-apple-darwin < %s | FileCheck %s
>>>> +; RUN: llc -O0 -fast-isel -fast-isel-abort=1 -verify-machineinstrs -mtriple=arm64-apple-darwin < %s | FileCheck %s
>>>>
>>>> ; Test load/store of global value from global offset table.
>>>> @seed = common global i64 0, align 8
>>>>
>>>> Modified: llvm/trunk/test/CodeGen/AArch64/arm64-fast-isel-icmp.ll
>>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/arm64-fast-isel-icmp.ll?rev=321655&r1=321654&r2=321655&view=diff
>>>> ==============================================================================
>>>> --- llvm/trunk/test/CodeGen/AArch64/arm64-fast-isel-icmp.ll (original)
>>>> +++ llvm/trunk/test/CodeGen/AArch64/arm64-fast-isel-icmp.ll Tue Jan 2 08:30:47 2018
>>>> @@ -1,4 +1,4 @@
>>>> -; RUN: llc -O0 -fast-isel-abort=1 -verify-machineinstrs -mtriple=arm64-apple-darwin < %s | FileCheck %s
>>>> +; RUN: llc -O0 -fast-isel -fast-isel-abort=1 -verify-machineinstrs -mtriple=arm64-apple-darwin < %s | FileCheck %s
>>>>
>>>> define i32 @icmp_eq_imm(i32 %a) nounwind ssp {
>>>> entry:
>>>>
>>>> Modified: llvm/trunk/test/CodeGen/AArch64/arm64-fast-isel-intrinsic.ll
>>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/arm64-fast-isel-intrinsic.ll?rev=321655&r1=321654&r2=321655&view=diff
>>>> ==============================================================================
>>>> --- llvm/trunk/test/CodeGen/AArch64/arm64-fast-isel-intrinsic.ll (original)
>>>> +++ llvm/trunk/test/CodeGen/AArch64/arm64-fast-isel-intrinsic.ll Tue Jan 2 08:30:47 2018
>>>> @@ -1,4 +1,4 @@
>>>> -; RUN: llc -O0 -fast-isel-abort=1 -verify-machineinstrs -relocation-model=dynamic-no-pic -mtriple=arm64-apple-ios < %s | FileCheck %s --check-prefix=ARM64
>>>> +; RUN: llc -O0 -fast-isel -fast-isel-abort=1 -verify-machineinstrs -relocation-model=dynamic-no-pic -mtriple=arm64-apple-ios < %s | FileCheck %s --check-prefix=ARM64
>>>>
>>>> @message = global [80 x i8] c"The LLVM Compiler Infrastructure\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00", align 16
>>>> @temp = common global [80 x i8] zeroinitializer, align 16
>>>>
>>>> Modified: llvm/trunk/test/CodeGen/AArch64/arm64-fast-isel-materialize.ll
>>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/arm64-fast-isel-materialize.ll?rev=321655&r1=321654&r2=321655&view=diff
>>>> ==============================================================================
>>>> --- llvm/trunk/test/CodeGen/AArch64/arm64-fast-isel-materialize.ll (original)
>>>> +++ llvm/trunk/test/CodeGen/AArch64/arm64-fast-isel-materialize.ll Tue Jan 2 08:30:47 2018
>>>> @@ -1,4 +1,4 @@
>>>> -; RUN: llc -O0 -fast-isel-abort=1 -verify-machineinstrs -mtriple=arm64-apple-darwin < %s | FileCheck %s
>>>> +; RUN: llc -O0 -fast-isel -fast-isel-abort=1 -verify-machineinstrs -mtriple=arm64-apple-darwin < %s | FileCheck %s
>>>>
>>>> ; Materialize using fmov
>>>> define float @fmov_float1() {
>>>>
>>>> Modified: llvm/trunk/test/CodeGen/AArch64/arm64-fast-isel-noconvert.ll
>>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/arm64-fast-isel-noconvert.ll?rev=321655&r1=321654&r2=321655&view=diff
>>>> ==============================================================================
>>>> --- llvm/trunk/test/CodeGen/AArch64/arm64-fast-isel-noconvert.ll (original)
>>>> +++ llvm/trunk/test/CodeGen/AArch64/arm64-fast-isel-noconvert.ll Tue Jan 2 08:30:47 2018
>>>> @@ -1,4 +1,4 @@
>>>> -; RUN: llc -O0 -verify-machineinstrs -mtriple=aarch64-apple-ios < %s | FileCheck %s
>>>> +; RUN: llc -O0 -fast-isel -verify-machineinstrs -mtriple=aarch64-apple-ios < %s | FileCheck %s
>>>>
>>>> ; Fast-isel can't do vector conversions yet, but it was emitting some highly
>>>> ; suspect UCVTFUWDri MachineInstrs.
>>>>
>>>> Modified: llvm/trunk/test/CodeGen/AArch64/arm64-fast-isel-rem.ll
>>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/arm64-fast-isel-rem.ll?rev=321655&r1=321654&r2=321655&view=diff
>>>> ==============================================================================
>>>> --- llvm/trunk/test/CodeGen/AArch64/arm64-fast-isel-rem.ll (original)
>>>> +++ llvm/trunk/test/CodeGen/AArch64/arm64-fast-isel-rem.ll Tue Jan 2 08:30:47 2018
>>>> @@ -1,5 +1,5 @@
>>>> -; RUN: llc -O0 -fast-isel-abort=1 -verify-machineinstrs -mtriple=arm64-apple-darwin < %s | FileCheck %s
>>>> -; RUN: llc %s -O0 -fast-isel-abort=1 -mtriple=arm64-apple-darwin -print-machineinstrs=expand-isel-pseudos -o /dev/null 2> %t
>>>> +; RUN: llc -O0 -fast-isel -fast-isel-abort=1 -verify-machineinstrs -mtriple=arm64-apple-darwin < %s | FileCheck %s
>>>> +; RUN: llc %s -O0 -fast-isel -fast-isel-abort=1 -mtriple=arm64-apple-darwin -print-machineinstrs=expand-isel-pseudos -o /dev/null 2> %t
>>>> ; RUN: FileCheck %s < %t --check-prefix=CHECK-SSA
>>>>
>>>> ; CHECK-SSA-LABEL: Machine code for function t1
>>>>
>>>> Modified: llvm/trunk/test/CodeGen/AArch64/arm64-fast-isel-ret.ll
>>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/arm64-fast-isel-ret.ll?rev=321655&r1=321654&r2=321655&view=diff
>>>> ==============================================================================
>>>> --- llvm/trunk/test/CodeGen/AArch64/arm64-fast-isel-ret.ll (original)
>>>> +++ llvm/trunk/test/CodeGen/AArch64/arm64-fast-isel-ret.ll Tue Jan 2 08:30:47 2018
>>>> @@ -1,4 +1,4 @@
>>>> -; RUN: llc -O0 -fast-isel-abort=1 -verify-machineinstrs -mtriple=arm64-apple-darwin < %s | FileCheck %s
>>>> +; RUN: llc -O0 -fast-isel -fast-isel-abort=1 -verify-machineinstrs -mtriple=arm64-apple-darwin < %s | FileCheck %s
>>>>
>>>> ;; Test returns.
>>>> define void @t0() nounwind ssp {
>>>>
>>>> Modified: llvm/trunk/test/CodeGen/AArch64/arm64-fast-isel.ll
>>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/arm64-fast-isel.ll?rev=321655&r1=321654&r2=321655&view=diff
>>>> ==============================================================================
>>>> --- llvm/trunk/test/CodeGen/AArch64/arm64-fast-isel.ll (original)
>>>> +++ llvm/trunk/test/CodeGen/AArch64/arm64-fast-isel.ll Tue Jan 2 08:30:47 2018
>>>> @@ -1,4 +1,4 @@
>>>> -; RUN: llc -O0 -fast-isel-abort=1 -verify-machineinstrs -mtriple=arm64-apple-darwin < %s | FileCheck %s
>>>> +; RUN: llc -O0 -fast-isel -fast-isel-abort=1 -verify-machineinstrs -mtriple=arm64-apple-darwin < %s | FileCheck %s
>>>>
>>>> define void @t0(i32 %a) nounwind {
>>>> entry:
>>>>
>>>> Modified: llvm/trunk/test/CodeGen/AArch64/arm64-simd-scalar-to-vector.ll
>>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/arm64-simd-scalar-to-vector.ll?rev=321655&r1=321654&r2=321655&view=diff
>>>> ==============================================================================
>>>> --- llvm/trunk/test/CodeGen/AArch64/arm64-simd-scalar-to-vector.ll (original)
>>>> +++ llvm/trunk/test/CodeGen/AArch64/arm64-simd-scalar-to-vector.ll Tue Jan 2 08:30:47 2018
>>>> @@ -1,5 +1,5 @@
>>>> ; RUN: llc < %s -mtriple=arm64-eabi -aarch64-neon-syntax=apple -mcpu=cyclone | FileCheck %s
>>>> -; RUN: llc < %s -mtriple=arm64-eabi -aarch64-neon-syntax=apple -O0 -mcpu=cyclone | FileCheck %s --check-prefix=CHECK-FAST
>>>> +; RUN: llc < %s -mtriple=arm64-eabi -aarch64-neon-syntax=apple -O0 -fast-isel -mcpu=cyclone | FileCheck %s --check-prefix=CHECK-FAST
>>>>
>>>> define <16 x i8> @foo(<16 x i8> %a) nounwind optsize readnone ssp {
>>>> ; CHECK: uaddlv.16b h0, v0
>>>>
>>>> Modified: llvm/trunk/test/CodeGen/AArch64/arm64-tls-dynamic-together.ll
>>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/arm64-tls-dynamic-together.ll?rev=321655&r1=321654&r2=321655&view=diff
>>>> ==============================================================================
>>>> --- llvm/trunk/test/CodeGen/AArch64/arm64-tls-dynamic-together.ll (original)
>>>> +++ llvm/trunk/test/CodeGen/AArch64/arm64-tls-dynamic-together.ll Tue Jan 2 08:30:47 2018
>>>> @@ -1,6 +1,6 @@
>>>> -; RUN: llc -O0 -mtriple=arm64-none-linux-gnu -relocation-model=pic \
>>>> +; RUN: llc -O0 -fast-isel -mtriple=arm64-none-linux-gnu -relocation-model=pic \
>>>> ; RUN: -verify-machineinstrs < %s | FileCheck -check-prefix=CHECK -check-prefix=NOEMU %s
>>>> -; RUN: llc -emulated-tls -O0 -mtriple=arm64-none-linux-gnu -relocation-model=pic \
>>>> +; RUN: llc -emulated-tls -O0 -fast-isel -mtriple=arm64-none-linux-gnu -relocation-model=pic \
>>>> ; RUN: -verify-machineinstrs < %s | FileCheck -check-prefix=CHECK -check-prefix=EMU %s
>>>>
>>>> ; If the .tlsdesccall and blr parts are emitted completely separately (even with
>>>>
>>>> Modified: llvm/trunk/test/CodeGen/AArch64/arm64-vcvt_f.ll
>>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/arm64-vcvt_f.ll?rev=321655&r1=321654&r2=321655&view=diff
>>>> ==============================================================================
>>>> --- llvm/trunk/test/CodeGen/AArch64/arm64-vcvt_f.ll (original)
>>>> +++ llvm/trunk/test/CodeGen/AArch64/arm64-vcvt_f.ll Tue Jan 2 08:30:47 2018
>>>> @@ -1,5 +1,5 @@
>>>> ; RUN: llc < %s -mtriple=arm64-eabi -aarch64-neon-syntax=apple | FileCheck %s
>>>> -; RUN: llc < %s -O0 -mtriple=arm64-eabi -aarch64-neon-syntax=apple | FileCheck %s
>>>> +; RUN: llc < %s -O0 -fast-isel -mtriple=arm64-eabi -aarch64-neon-syntax=apple | FileCheck %s
>>>>
>>>> define <2 x double> @test_vcvt_f64_f32(<2 x float> %x) nounwind readnone ssp {
>>>> ; CHECK-LABEL: test_vcvt_f64_f32:
>>>>
>>>> Modified: llvm/trunk/test/CodeGen/AArch64/br-cond-not-merge.ll
>>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/br-cond-not-merge.ll?rev=321655&r1=321654&r2=321655&view=diff
>>>> ==============================================================================
>>>> --- llvm/trunk/test/CodeGen/AArch64/br-cond-not-merge.ll (original)
>>>> +++ llvm/trunk/test/CodeGen/AArch64/br-cond-not-merge.ll Tue Jan 2 08:30:47 2018
>>>> @@ -1,5 +1,5 @@
>>>> ; RUN: llc -mtriple=aarch64 -verify-machineinstrs < %s | FileCheck --check-prefix=CHECK --check-prefix=OPT %s
>>>> -; RUN: llc -mtriple=aarch64 -verify-machineinstrs -O0 -fast-isel=0 < %s | FileCheck --check-prefix=CHECK --check-prefix=NOOPT %s
>>>> +; RUN: llc -mtriple=aarch64 -verify-machineinstrs -O0 -fast-isel=0 -global-isel=false < %s | FileCheck --check-prefix=CHECK --check-prefix=NOOPT %s
>>>>
>>>> declare void @foo()
>>>>
>>>>
>>>> Modified: llvm/trunk/test/CodeGen/AArch64/cmpxchg-O0.ll
>>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/cmpxchg-O0.ll?rev=321655&r1=321654&r2=321655&view=diff
>>>> ==============================================================================
>>>> --- llvm/trunk/test/CodeGen/AArch64/cmpxchg-O0.ll (original)
>>>> +++ llvm/trunk/test/CodeGen/AArch64/cmpxchg-O0.ll Tue Jan 2 08:30:47 2018
>>>> @@ -1,4 +1,4 @@
>>>> -; RUN: llc -verify-machineinstrs -mtriple=aarch64-linux-gnu -O0 -fast-isel=0 %s -o - | FileCheck %s
>>>> +; RUN: llc -verify-machineinstrs -mtriple=aarch64-linux-gnu -O0 -fast-isel=0 -global-isel=false %s -o - | FileCheck %s
>>>>
>>>> define { i8, i1 } @test_cmpxchg_8(i8* %addr, i8 %desired, i8 %new) nounwind {
>>>> ; CHECK-LABEL: test_cmpxchg_8:
>>>>
>>>> Modified: llvm/trunk/test/CodeGen/AArch64/cxx-tlscc.ll
>>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/cxx-tlscc.ll?rev=321655&r1=321654&r2=321655&view=diff
>>>> ==============================================================================
>>>> --- llvm/trunk/test/CodeGen/AArch64/cxx-tlscc.ll (original)
>>>> +++ llvm/trunk/test/CodeGen/AArch64/cxx-tlscc.ll Tue Jan 2 08:30:47 2018
>>>> @@ -3,7 +3,7 @@
>>>> ; Shrink wrapping currently does not kick in because we have a TLS CALL
>>>> ; in the entry block and it will clobber the link register.
>>>>
>>>> -; RUN: llc < %s -mtriple=aarch64-apple-ios -O0 | FileCheck --check-prefix=CHECK-O0 %s
>>>> +; RUN: llc < %s -mtriple=aarch64-apple-ios -O0 -fast-isel | FileCheck --check-prefix=CHECK-O0 %s
>>>>
>>>> %struct.S = type { i8 }
>>>>
>>>>
>>>> Modified: llvm/trunk/test/CodeGen/AArch64/fast-isel-atomic.ll
>>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/fast-isel-atomic.ll?rev=321655&r1=321654&r2=321655&view=diff
>>>> ==============================================================================
>>>> --- llvm/trunk/test/CodeGen/AArch64/fast-isel-atomic.ll (original)
>>>> +++ llvm/trunk/test/CodeGen/AArch64/fast-isel-atomic.ll Tue Jan 2 08:30:47 2018
>>>> @@ -1,5 +1,5 @@
>>>> ; RUN: llc -mtriple=aarch64-- -O0 -fast-isel -fast-isel-abort=4 -verify-machineinstrs < %s | FileCheck %s
>>>> -; RUN: llc -mtriple=aarch64-- -O0 -fast-isel=0 -verify-machineinstrs < %s | FileCheck %s
>>>> +; RUN: llc -mtriple=aarch64-- -O0 -fast-isel=0 -global-isel=false -verify-machineinstrs < %s | FileCheck %s
>>>>
>>>> ; Note that checking SelectionDAG output isn't strictly necessary, but they
>>>> ; currently match, so we might as well check both! Feel free to remove SDAG.
>>>>
>>>> Modified: llvm/trunk/test/CodeGen/AArch64/fast-isel-sp-adjust.ll
>>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/fast-isel-sp-adjust.ll?rev=321655&r1=321654&r2=321655&view=diff
>>>> ==============================================================================
>>>> --- llvm/trunk/test/CodeGen/AArch64/fast-isel-sp-adjust.ll (original)
>>>> +++ llvm/trunk/test/CodeGen/AArch64/fast-isel-sp-adjust.ll Tue Jan 2 08:30:47 2018
>>>> @@ -1,5 +1,5 @@
>>>> -; RUN: llc -O0 -mtriple=aarch64-apple-ios -o - %s | FileCheck %s
>>>> -; RUN: not llc -O0 -mtriple=aarch64-apple-ios -o /dev/null -fast-isel-abort=3 %s 2> %t
>>>> +; RUN: llc -O0 -fast-isel -mtriple=aarch64-apple-ios -o - %s | FileCheck %s
>>>> +; RUN: not llc -O0 -mtriple=aarch64-apple-ios -o /dev/null -fast-isel -fast-isel-abort=3 %s 2> %t
>>>> ; RUN: FileCheck %s --check-prefix=CHECK-ERRORS < %t
>>>>
>>>> ; The issue here is that FastISel cannot emit an ADDrr where one of the inputs
>>>>
>>>> Modified: llvm/trunk/test/CodeGen/AArch64/i128-fast-isel-fallback.ll
>>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/i128-fast-isel-fallback.ll?rev=321655&r1=321654&r2=321655&view=diff
>>>> ==============================================================================
>>>> --- llvm/trunk/test/CodeGen/AArch64/i128-fast-isel-fallback.ll (original)
>>>> +++ llvm/trunk/test/CodeGen/AArch64/i128-fast-isel-fallback.ll Tue Jan 2 08:30:47 2018
>>>> @@ -1,4 +1,4 @@
>>>> -; RUN: llc -O0 -mtriple=arm64-apple-ios7.0 -mcpu=generic < %s | FileCheck %s
>>>> +; RUN: llc -O0 -fast-isel -mtriple=arm64-apple-ios7.0 -mcpu=generic < %s | FileCheck %s
>>>>
>>>> ; Function Attrs: nounwind ssp
>>>> define void @test1() {
>>>>
>>>> Modified: llvm/trunk/test/CodeGen/AArch64/preferred-alignment.ll
>>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/preferred-alignment.ll?rev=321655&r1=321654&r2=321655&view=diff
>>>> ==============================================================================
>>>> --- llvm/trunk/test/CodeGen/AArch64/preferred-alignment.ll (original)
>>>> +++ llvm/trunk/test/CodeGen/AArch64/preferred-alignment.ll Tue Jan 2 08:30:47 2018
>>>> @@ -1,4 +1,4 @@
>>>> -; RUN: llc -mtriple=aarch64 -O0 < %s | FileCheck %s
>>>> +; RUN: llc -mtriple=aarch64 -O0 -fast-isel < %s | FileCheck %s
>>>>
>>>> ; Function Attrs: nounwind
>>>> define i32 @foo() #0 {
>>>>
>>>> Modified: llvm/trunk/test/CodeGen/AArch64/swift-return.ll
>>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/swift-return.ll?rev=321655&r1=321654&r2=321655&view=diff
>>>> ==============================================================================
>>>> --- llvm/trunk/test/CodeGen/AArch64/swift-return.ll (original)
>>>> +++ llvm/trunk/test/CodeGen/AArch64/swift-return.ll Tue Jan 2 08:30:47 2018
>>>> @@ -1,5 +1,5 @@
>>>> ; RUN: llc -verify-machineinstrs -mtriple=aarch64-apple-ios -o - %s | FileCheck %s
>>>> -; RUN: llc -O0 -verify-machineinstrs -mtriple=aarch64-apple-ios -o - %s | FileCheck %s --check-prefix=CHECK-O0
>>>> +; RUN: llc -O0 -fast-isel -verify-machineinstrs -mtriple=aarch64-apple-ios -o - %s | FileCheck %s --check-prefix=CHECK-O0
>>>>
>>>> ; CHECK-LABEL: test1
>>>> ; CHECK: bl _gen
>>>>
>>>> Modified: llvm/trunk/test/CodeGen/AArch64/swifterror.ll
>>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/swifterror.ll?rev=321655&r1=321654&r2=321655&view=diff
>>>> ==============================================================================
>>>> --- llvm/trunk/test/CodeGen/AArch64/swifterror.ll (original)
>>>> +++ llvm/trunk/test/CodeGen/AArch64/swifterror.ll Tue Jan 2 08:30:47 2018
>>>> @@ -1,5 +1,5 @@
>>>> ; RUN: llc -verify-machineinstrs -disable-fp-elim -enable-shrink-wrap=false < %s -mtriple=aarch64-apple-ios -disable-post-ra | FileCheck --check-prefix=CHECK-APPLE %s
>>>> -; RUN: llc -verify-machineinstrs -disable-fp-elim -O0 < %s -mtriple=aarch64-apple-ios -disable-post-ra | FileCheck --check-prefix=CHECK-O0 %s
>>>> +; RUN: llc -verify-machineinstrs -disable-fp-elim -O0 -fast-isel < %s -mtriple=aarch64-apple-ios -disable-post-ra | FileCheck --check-prefix=CHECK-O0 %s
>>>>
>>>> declare i8* @malloc(i64)
>>>> declare void @free(i8*)
>>>>
>>>> Modified: llvm/trunk/test/CodeGen/AArch64/swiftself.ll
>>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/swiftself.ll?rev=321655&r1=321654&r2=321655&view=diff
>>>> ==============================================================================
>>>> --- llvm/trunk/test/CodeGen/AArch64/swiftself.ll (original)
>>>> +++ llvm/trunk/test/CodeGen/AArch64/swiftself.ll Tue Jan 2 08:30:47 2018
>>>> @@ -1,5 +1,5 @@
>>>> ; RUN: llc -verify-machineinstrs -mtriple=aarch64-apple-ios -o - %s | FileCheck --check-prefix=CHECK --check-prefix=OPT %s
>>>> -; RUN: llc -O0 -verify-machineinstrs -mtriple=aarch64-apple-ios -o - %s | FileCheck %s
>>>> +; RUN: llc -O0 -fast-isel -verify-machineinstrs -mtriple=aarch64-apple-ios -o - %s | FileCheck %s
>>>> ; RUN: llc -verify-machineinstrs -mtriple=aarch64-unknown-linux-gnu -o - %s | FileCheck --check-prefix=CHECK --check-prefix=OPT %s
>>>>
>>>> ; Parameter with swiftself should be allocated to x20.
>>>>
>>>> Modified: llvm/trunk/test/CodeGen/AArch64/tailcall-fastisel.ll
>>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/tailcall-fastisel.ll?rev=321655&r1=321654&r2=321655&view=diff
>>>> ==============================================================================
>>>> --- llvm/trunk/test/CodeGen/AArch64/tailcall-fastisel.ll (original)
>>>> +++ llvm/trunk/test/CodeGen/AArch64/tailcall-fastisel.ll Tue Jan 2 08:30:47 2018
>>>> @@ -1,4 +1,4 @@
>>>> -; RUN: llc < %s -mtriple=arm64-apple-darwin -O0 | FileCheck %s
>>>> +; RUN: llc < %s -mtriple=arm64-apple-darwin -O0 -fast-isel | FileCheck %s
>>>>
>>>> ; CHECK: b _foo0
>>>>
>>>>
>>>> Modified: llvm/trunk/test/DebugInfo/AArch64/asan-stack-vars.ll
>>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/AArch64/asan-stack-vars.ll?rev=321655&r1=321654&r2=321655&view=diff
>>>> ==============================================================================
>>>> --- llvm/trunk/test/DebugInfo/AArch64/asan-stack-vars.ll (original)
>>>> +++ llvm/trunk/test/DebugInfo/AArch64/asan-stack-vars.ll Tue Jan 2 08:30:47 2018
>>>> @@ -1,4 +1,4 @@
>>>> -; RUN: llc -O0 -filetype=obj -o - %s | llvm-dwarfdump -v - | FileCheck %s
>>>> +; RUN: llc -O0 -fast-isel -filetype=obj -o - %s | llvm-dwarfdump -v - | FileCheck %s
>>>> ;
>>>> ; Derived from (clang -O0 -g -fsanitize=address -fobjc-arc)
>>>> ; @protocol NSObject
>>>>
>>>> Modified: llvm/trunk/test/DebugInfo/AArch64/frameindices.ll
>>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/AArch64/frameindices.ll?rev=321655&r1=321654&r2=321655&view=diff
>>>> ==============================================================================
>>>> --- llvm/trunk/test/DebugInfo/AArch64/frameindices.ll (original)
>>>> +++ llvm/trunk/test/DebugInfo/AArch64/frameindices.ll Tue Jan 2 08:30:47 2018
>>>> @@ -1,4 +1,4 @@
>>>> -; RUN: llc -disable-fp-elim -O0 -filetype=obj < %s | llvm-dwarfdump -v - | FileCheck %s
>>>> +; RUN: llc -disable-fp-elim -O0 -fast-isel -filetype=obj < %s | llvm-dwarfdump -v - | FileCheck %s
>>>> ; Test that a variable with multiple entries in the MMI table makes it into the
>>>> ; debug info.
>>>> ;
>>>>
>>>> Modified: llvm/trunk/test/DebugInfo/AArch64/line-header.ll
>>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/AArch64/line-header.ll?rev=321655&r1=321654&r2=321655&view=diff
>>>> ==============================================================================
>>>> --- llvm/trunk/test/DebugInfo/AArch64/line-header.ll (original)
>>>> +++ llvm/trunk/test/DebugInfo/AArch64/line-header.ll Tue Jan 2 08:30:47 2018
>>>> @@ -1,5 +1,5 @@
>>>> -; RUN: llc -mtriple=aarch64-none-linux -O0 -filetype=obj - < %S/../Inputs/line.ll | llvm-dwarfdump -v - | FileCheck %s
>>>> -; RUN: llc -mtriple=aarch64_be-none-linux -O0 -filetype=obj - < %S/../Inputs/line.ll | llvm-dwarfdump -v - | FileCheck %s
>>>> +; RUN: llc -mtriple=aarch64-none-linux -O0 -fast-isel -filetype=obj - < %S/../Inputs/line.ll | llvm-dwarfdump -v - | FileCheck %s
>>>> +; RUN: llc -mtriple=aarch64_be-none-linux -O0 -fast-isel -filetype=obj - < %S/../Inputs/line.ll | llvm-dwarfdump -v - | FileCheck %s
>>>>
>>>> ; check line table length is correctly calculated for both big and little endian
>>>> CHECK-LABEL: .debug_line contents:
>>>>
>>>> Modified: llvm/trunk/test/DebugInfo/AArch64/prologue_end.ll
>>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/AArch64/prologue_end.ll?rev=321655&r1=321654&r2=321655&view=diff
>>>> ==============================================================================
>>>> --- llvm/trunk/test/DebugInfo/AArch64/prologue_end.ll (original)
>>>> +++ llvm/trunk/test/DebugInfo/AArch64/prologue_end.ll Tue Jan 2 08:30:47 2018
>>>> @@ -1,4 +1,4 @@
>>>> -; RUN: llc -disable-fp-elim -O0 %s -mtriple aarch64-apple-darwin -o - | FileCheck %s
>>>> +; RUN: llc -disable-fp-elim -O0 -fast-isel %s -mtriple aarch64-apple-darwin -o - | FileCheck %s
>>>>
>>>> ; int func(void);
>>>> ; void prologue_end_test() {
>>>>
>>>>
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