[PATCH] D41441: [AArch64][SVE] Asm: Add restricted register classes for SVE predicate vectors.

Sander de Smalen via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Jan 2 06:42:21 PST 2018


sdesmalen updated this revision to Diff 128415.
sdesmalen added a comment.

Removed some code duplication around PPR and PPR_3b register classes.


https://reviews.llvm.org/D41441

Files:
  lib/Target/AArch64/AArch64RegisterInfo.td
  lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
  lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp

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