[llvm] r321638 - [SelectionDAG] Teach WidenVecOp_Convert to widen the operation if a widened result type would still be legal.
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Mon Jan 1 23:30:53 PST 2018
Author: ctopper
Date: Mon Jan 1 23:30:53 2018
New Revision: 321638
URL: http://llvm.org/viewvc/llvm-project?rev=321638&view=rev
Log:
[SelectionDAG] Teach WidenVecOp_Convert to widen the operation if a widened result type would still be legal.
Modified:
llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
llvm/trunk/test/CodeGen/X86/avx512-cvt.ll
llvm/trunk/test/CodeGen/X86/vec_fp_to_int.ll
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp?rev=321638&r1=321637&r2=321638&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp Mon Jan 1 23:30:53 2018
@@ -3438,9 +3438,7 @@ SDValue DAGTypeLegalizer::WidenVecOp_FCO
}
SDValue DAGTypeLegalizer::WidenVecOp_Convert(SDNode *N) {
- // Since the result is legal and the input is illegal, it is unlikely that we
- // can fix the input to a legal type so unroll the convert into some scalar
- // code and create a nasty build vector.
+ // Since the result is legal and the input is illegal.
EVT VT = N->getValueType(0);
EVT EltVT = VT.getVectorElementType();
SDLoc dl(N);
@@ -3451,9 +3449,20 @@ SDValue DAGTypeLegalizer::WidenVecOp_Con
"Unexpected type action");
InOp = GetWidenedVector(InOp);
EVT InVT = InOp.getValueType();
+ unsigned Opcode = N->getOpcode();
+
+ // See if a widened result type would be legal, if so widen the node.
+ EVT WideVT = EVT::getVectorVT(*DAG.getContext(), EltVT,
+ InVT.getVectorNumElements());
+ if (TLI.isTypeLegal(WideVT)) {
+ SDValue Res = DAG.getNode(Opcode, dl, WideVT, InOp);
+ return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, VT, Res,
+ DAG.getIntPtrConstant(0, dl));
+ }
+
EVT InEltVT = InVT.getVectorElementType();
- unsigned Opcode = N->getOpcode();
+ // Unroll the convert into some scalar code and create a nasty build vector.
SmallVector<SDValue, 16> Ops(NumElts);
for (unsigned i=0; i < NumElts; ++i)
Ops[i] = DAG.getNode(
Modified: llvm/trunk/test/CodeGen/X86/avx512-cvt.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/avx512-cvt.ll?rev=321638&r1=321637&r2=321638&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/avx512-cvt.ll (original)
+++ llvm/trunk/test/CodeGen/X86/avx512-cvt.ll Mon Jan 1 23:30:53 2018
@@ -2101,57 +2101,37 @@ define <8 x i64> @test_8f64toub(<8 x dou
}
define <2 x i64> @test_2f32toub(<2 x float> %a, <2 x i64> %passthru) {
-; NOVL-LABEL: test_2f32toub:
-; NOVL: # %bb.0:
-; NOVL-NEXT: vcvttss2usi %xmm0, %rax
-; NOVL-NEXT: vmovq %rax, %xmm2
-; NOVL-NEXT: vmovshdup {{.*#+}} xmm0 = xmm0[1,1,3,3]
-; NOVL-NEXT: vcvttss2usi %xmm0, %rax
-; NOVL-NEXT: vmovq %rax, %xmm0
-; NOVL-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm2[0],xmm0[0]
-; NOVL-NEXT: vpsllq $63, %xmm0, %xmm0
-; NOVL-NEXT: vpsraq $63, %zmm0, %zmm0
-; NOVL-NEXT: vpand %xmm1, %xmm0, %xmm0
-; NOVL-NEXT: vzeroupper
-; NOVL-NEXT: retq
+; NOVLDQ-LABEL: test_2f32toub:
+; NOVLDQ: # %bb.0:
+; NOVLDQ-NEXT: vcvttss2usi %xmm0, %rax
+; NOVLDQ-NEXT: vmovq %rax, %xmm2
+; NOVLDQ-NEXT: vmovshdup {{.*#+}} xmm0 = xmm0[1,1,3,3]
+; NOVLDQ-NEXT: vcvttss2usi %xmm0, %rax
+; NOVLDQ-NEXT: vmovq %rax, %xmm0
+; NOVLDQ-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm2[0],xmm0[0]
+; NOVLDQ-NEXT: vpsllq $63, %xmm0, %xmm0
+; NOVLDQ-NEXT: vpsraq $63, %zmm0, %zmm0
+; NOVLDQ-NEXT: vpand %xmm1, %xmm0, %xmm0
+; NOVLDQ-NEXT: vzeroupper
+; NOVLDQ-NEXT: retq
+;
+; VL-LABEL: test_2f32toub:
+; VL: # %bb.0:
+; VL-NEXT: vcvttps2dq %xmm0, %xmm0
+; VL-NEXT: vpslld $31, %xmm0, %xmm0
+; VL-NEXT: vptestmd %xmm0, %xmm0, %k1
+; VL-NEXT: vmovdqa64 %xmm1, %xmm0 {%k1} {z}
+; VL-NEXT: retq
;
-; VLBW-LABEL: test_2f32toub:
-; VLBW: # %bb.0:
-; VLBW-NEXT: vmovshdup {{.*#+}} xmm2 = xmm0[1,1,3,3]
-; VLBW-NEXT: vcvttss2si %xmm2, %eax
-; VLBW-NEXT: kmovd %eax, %k0
-; VLBW-NEXT: vcvttss2si %xmm0, %eax
-; VLBW-NEXT: andl $1, %eax
-; VLBW-NEXT: kmovw %eax, %k1
-; VLBW-NEXT: kshiftrw $1, %k0, %k2
-; VLBW-NEXT: kshiftlw $1, %k2, %k2
-; VLBW-NEXT: korw %k1, %k2, %k1
-; VLBW-NEXT: kshiftrw $1, %k1, %k2
-; VLBW-NEXT: kxorw %k0, %k2, %k0
-; VLBW-NEXT: kshiftlw $15, %k0, %k0
-; VLBW-NEXT: kshiftrw $14, %k0, %k0
-; VLBW-NEXT: kxorw %k1, %k0, %k1
-; VLBW-NEXT: vmovdqa64 %xmm1, %xmm0 {%k1} {z}
-; VLBW-NEXT: retq
-;
-; VLNOBW-LABEL: test_2f32toub:
-; VLNOBW: # %bb.0:
-; VLNOBW-NEXT: vmovshdup {{.*#+}} xmm2 = xmm0[1,1,3,3]
-; VLNOBW-NEXT: vcvttss2si %xmm2, %eax
-; VLNOBW-NEXT: kmovw %eax, %k0
-; VLNOBW-NEXT: vcvttss2si %xmm0, %eax
-; VLNOBW-NEXT: andl $1, %eax
-; VLNOBW-NEXT: kmovw %eax, %k1
-; VLNOBW-NEXT: kshiftrw $1, %k0, %k2
-; VLNOBW-NEXT: kshiftlw $1, %k2, %k2
-; VLNOBW-NEXT: korw %k1, %k2, %k1
-; VLNOBW-NEXT: kshiftrw $1, %k1, %k2
-; VLNOBW-NEXT: kxorw %k0, %k2, %k0
-; VLNOBW-NEXT: kshiftlw $15, %k0, %k0
-; VLNOBW-NEXT: kshiftrw $14, %k0, %k0
-; VLNOBW-NEXT: kxorw %k1, %k0, %k1
-; VLNOBW-NEXT: vmovdqa64 %xmm1, %xmm0 {%k1} {z}
-; VLNOBW-NEXT: retq
+; AVX512DQ-LABEL: test_2f32toub:
+; AVX512DQ: # %bb.0:
+; AVX512DQ-NEXT: # kill: def %xmm0 killed %xmm0 def %ymm0
+; AVX512DQ-NEXT: vcvttps2uqq %ymm0, %zmm0
+; AVX512DQ-NEXT: vpsllq $63, %xmm0, %xmm0
+; AVX512DQ-NEXT: vpsraq $63, %zmm0, %zmm0
+; AVX512DQ-NEXT: vpand %xmm1, %xmm0, %xmm0
+; AVX512DQ-NEXT: vzeroupper
+; AVX512DQ-NEXT: retq
%mask = fptoui <2 x float> %a to <2 x i1>
%select = select <2 x i1> %mask, <2 x i64> %passthru, <2 x i64> zeroinitializer
ret <2 x i64> %select
@@ -2285,54 +2265,31 @@ define <8 x i64> @test_8f64tosb(<8 x dou
}
define <2 x i64> @test_2f32tosb(<2 x float> %a, <2 x i64> %passthru) {
-; NOVL-LABEL: test_2f32tosb:
-; NOVL: # %bb.0:
-; NOVL-NEXT: vcvttss2si %xmm0, %rax
-; NOVL-NEXT: vmovq %rax, %xmm2
-; NOVL-NEXT: vmovshdup {{.*#+}} xmm0 = xmm0[1,1,3,3]
-; NOVL-NEXT: vcvttss2si %xmm0, %rax
-; NOVL-NEXT: vmovq %rax, %xmm0
-; NOVL-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm2[0],xmm0[0]
-; NOVL-NEXT: vpand %xmm1, %xmm0, %xmm0
-; NOVL-NEXT: retq
+; NOVLDQ-LABEL: test_2f32tosb:
+; NOVLDQ: # %bb.0:
+; NOVLDQ-NEXT: vcvttss2si %xmm0, %rax
+; NOVLDQ-NEXT: vmovq %rax, %xmm2
+; NOVLDQ-NEXT: vmovshdup {{.*#+}} xmm0 = xmm0[1,1,3,3]
+; NOVLDQ-NEXT: vcvttss2si %xmm0, %rax
+; NOVLDQ-NEXT: vmovq %rax, %xmm0
+; NOVLDQ-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm2[0],xmm0[0]
+; NOVLDQ-NEXT: vpand %xmm1, %xmm0, %xmm0
+; NOVLDQ-NEXT: retq
+;
+; VL-LABEL: test_2f32tosb:
+; VL: # %bb.0:
+; VL-NEXT: vcvttps2dq %xmm0, %xmm0
+; VL-NEXT: vptestmd %xmm0, %xmm0, %k1
+; VL-NEXT: vmovdqa64 %xmm1, %xmm0 {%k1} {z}
+; VL-NEXT: retq
;
-; VLBW-LABEL: test_2f32tosb:
-; VLBW: # %bb.0:
-; VLBW-NEXT: vmovshdup {{.*#+}} xmm2 = xmm0[1,1,3,3]
-; VLBW-NEXT: vcvttss2si %xmm2, %eax
-; VLBW-NEXT: kmovd %eax, %k0
-; VLBW-NEXT: vcvttss2si %xmm0, %eax
-; VLBW-NEXT: andl $1, %eax
-; VLBW-NEXT: kmovw %eax, %k1
-; VLBW-NEXT: kshiftrw $1, %k0, %k2
-; VLBW-NEXT: kshiftlw $1, %k2, %k2
-; VLBW-NEXT: korw %k1, %k2, %k1
-; VLBW-NEXT: kshiftrw $1, %k1, %k2
-; VLBW-NEXT: kxorw %k0, %k2, %k0
-; VLBW-NEXT: kshiftlw $15, %k0, %k0
-; VLBW-NEXT: kshiftrw $14, %k0, %k0
-; VLBW-NEXT: kxorw %k1, %k0, %k1
-; VLBW-NEXT: vmovdqa64 %xmm1, %xmm0 {%k1} {z}
-; VLBW-NEXT: retq
-;
-; VLNOBW-LABEL: test_2f32tosb:
-; VLNOBW: # %bb.0:
-; VLNOBW-NEXT: vmovshdup {{.*#+}} xmm2 = xmm0[1,1,3,3]
-; VLNOBW-NEXT: vcvttss2si %xmm2, %eax
-; VLNOBW-NEXT: kmovw %eax, %k0
-; VLNOBW-NEXT: vcvttss2si %xmm0, %eax
-; VLNOBW-NEXT: andl $1, %eax
-; VLNOBW-NEXT: kmovw %eax, %k1
-; VLNOBW-NEXT: kshiftrw $1, %k0, %k2
-; VLNOBW-NEXT: kshiftlw $1, %k2, %k2
-; VLNOBW-NEXT: korw %k1, %k2, %k1
-; VLNOBW-NEXT: kshiftrw $1, %k1, %k2
-; VLNOBW-NEXT: kxorw %k0, %k2, %k0
-; VLNOBW-NEXT: kshiftlw $15, %k0, %k0
-; VLNOBW-NEXT: kshiftrw $14, %k0, %k0
-; VLNOBW-NEXT: kxorw %k1, %k0, %k1
-; VLNOBW-NEXT: vmovdqa64 %xmm1, %xmm0 {%k1} {z}
-; VLNOBW-NEXT: retq
+; AVX512DQ-LABEL: test_2f32tosb:
+; AVX512DQ: # %bb.0:
+; AVX512DQ-NEXT: # kill: def %xmm0 killed %xmm0 def %ymm0
+; AVX512DQ-NEXT: vcvttps2qq %ymm0, %zmm0
+; AVX512DQ-NEXT: vandps %xmm1, %xmm0, %xmm0
+; AVX512DQ-NEXT: vzeroupper
+; AVX512DQ-NEXT: retq
%mask = fptosi <2 x float> %a to <2 x i1>
%select = select <2 x i1> %mask, <2 x i64> %passthru, <2 x i64> zeroinitializer
ret <2 x i64> %select
Modified: llvm/trunk/test/CodeGen/X86/vec_fp_to_int.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vec_fp_to_int.ll?rev=321638&r1=321637&r2=321638&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vec_fp_to_int.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vec_fp_to_int.ll Mon Jan 1 23:30:53 2018
@@ -919,12 +919,10 @@ define <2 x i64> @fptosi_2f32_to_2i64(<4
;
; AVX512DQ-LABEL: fptosi_2f32_to_2i64:
; AVX512DQ: # %bb.0:
-; AVX512DQ-NEXT: vcvttss2si %xmm0, %rax
-; AVX512DQ-NEXT: vmovq %rax, %xmm1
-; AVX512DQ-NEXT: vmovshdup {{.*#+}} xmm0 = xmm0[1,1,3,3]
-; AVX512DQ-NEXT: vcvttss2si %xmm0, %rax
-; AVX512DQ-NEXT: vmovq %rax, %xmm0
-; AVX512DQ-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
+; AVX512DQ-NEXT: # kill: def %xmm0 killed %xmm0 def %ymm0
+; AVX512DQ-NEXT: vcvttps2qq %ymm0, %zmm0
+; AVX512DQ-NEXT: # kill: def %xmm0 killed %xmm0 killed %zmm0
+; AVX512DQ-NEXT: vzeroupper
; AVX512DQ-NEXT: retq
;
; AVX512VLDQ-LABEL: fptosi_2f32_to_2i64:
@@ -1448,12 +1446,10 @@ define <2 x i64> @fptoui_2f32_to_2i64(<4
;
; AVX512DQ-LABEL: fptoui_2f32_to_2i64:
; AVX512DQ: # %bb.0:
-; AVX512DQ-NEXT: vcvttss2usi %xmm0, %rax
-; AVX512DQ-NEXT: vmovq %rax, %xmm1
-; AVX512DQ-NEXT: vmovshdup {{.*#+}} xmm0 = xmm0[1,1,3,3]
-; AVX512DQ-NEXT: vcvttss2usi %xmm0, %rax
-; AVX512DQ-NEXT: vmovq %rax, %xmm0
-; AVX512DQ-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
+; AVX512DQ-NEXT: # kill: def %xmm0 killed %xmm0 def %ymm0
+; AVX512DQ-NEXT: vcvttps2uqq %ymm0, %zmm0
+; AVX512DQ-NEXT: # kill: def %xmm0 killed %xmm0 killed %zmm0
+; AVX512DQ-NEXT: vzeroupper
; AVX512DQ-NEXT: retq
;
; AVX512VLDQ-LABEL: fptoui_2f32_to_2i64:
More information about the llvm-commits
mailing list