[llvm] r321565 - [mips] Replace assert by an error message

[Simon Atanasyan via llvm-commits]

Author: atanasyan
Date: Fri Dec 29 11:18:24 2017
New Revision: 321565

URL: http://llvm.org/viewvc/llvm-project?rev=321565&view=rev
Log:
[mips] Replace assert by an error message

Initially, if the `c` constraint applied to the wrong data type that
causes LLVM to assert. This commit replaces the assert by an error
message.

Added:
    llvm/trunk/test/CodeGen/Mips/constraint-c-err.ll
    llvm/trunk/test/CodeGen/Mips/constraint-c.ll
Modified:
    llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp

Modified: llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp?rev=321565&r1=321564&r2=321565&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp Fri Dec 29 11:18:24 2017
@@ -3863,8 +3863,10 @@ MipsTargetLowering::getRegForInlineAsmCo
     case 'c': // register suitable for indirect jump
       if (VT == MVT::i32)
         return std::make_pair((unsigned)Mips::T9, &Mips::GPR32RegClass);
-      assert(VT == MVT::i64 && "Unexpected type.");
-      return std::make_pair((unsigned)Mips::T9_64, &Mips::GPR64RegClass);
+      if (VT == MVT::i64)
+        return std::make_pair((unsigned)Mips::T9_64, &Mips::GPR64RegClass);
+      // This will generate an error message
+      return std::make_pair(0U, nullptr);
     case 'l': // register suitable for indirect jump
       if (VT == MVT::i32)
         return std::make_pair((unsigned)Mips::LO0, &Mips::LO32RegClass);

Added: llvm/trunk/test/CodeGen/Mips/constraint-c-err.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/constraint-c-err.ll?rev=321565&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/constraint-c-err.ll (added)
+++ llvm/trunk/test/CodeGen/Mips/constraint-c-err.ll Fri Dec 29 11:18:24 2017
@@ -0,0 +1,17 @@
+; Check that invalid type for constraint `c` causes an error message.
+; RUN: not llc -march=mips -target-abi o32 < %s 2>&1 | FileCheck %s
+
+define i32 @main() #0 {
+entry:
+  %jmp = alloca float, align 4
+  store float 0x4200000000000000, float* %jmp, align 4
+  %0 = load float, float* %jmp, align 4
+  call void asm sideeffect "jr $0", "c,~{$1}"(float %0) #1
+
+; CHECK: error: couldn't allocate input reg for constraint 'c'
+
+  ret i32 0
+}
+
+attributes #0 = { noinline nounwind }
+attributes #1 = { nounwind }

Added: llvm/trunk/test/CodeGen/Mips/constraint-c.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/constraint-c.ll?rev=321565&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/constraint-c.ll (added)
+++ llvm/trunk/test/CodeGen/Mips/constraint-c.ll Fri Dec 29 11:18:24 2017
@@ -0,0 +1,18 @@
+; Check handling of the constraint `c`.
+; RUN: llc -march=mips -target-abi o32 < %s | FileCheck %s
+
+define i32 @main() #0 {
+entry:
+  %jmp = alloca i32, align 4
+  store i32 0, i32* %jmp, align 4
+  %0 = load i32, i32* %jmp, align 4
+  call void asm sideeffect "jr $0", "c,~{$1}"(i32 %0) #1
+
+; CHECK: addiu   $25, $zero, 0
+; CHECK: jr      $25
+
+  ret i32 0
+}
+
+attributes #0 = { noinline nounwind }
+attributes #1 = { nounwind }