[PATCH] D41595: Incorrect operand sizes for some MMX instructions: punpcklwd, punpcklbw and punpckldq

Andrew V. Tischenko via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Dec 28 08:24:08 PST 2017


avt77 updated this revision to Diff 128298.
avt77 added a comment.

I changed the implementation accodingly Craig's requiremetns: now it's shorter and more effective.


https://reviews.llvm.org/D41595

Files:
  lib/Target/X86/X86InstrMMX.td
  test/MC/X86/intel-syntax-error.s
  test/MC/X86/intel-syntax.s
  test/MC/X86/x86_64-asm-match.s


Index: test/MC/X86/x86_64-asm-match.s
===================================================================
--- test/MC/X86/x86_64-asm-match.s
+++ test/MC/X86/x86_64-asm-match.s
@@ -39,7 +39,7 @@
 // CHECK:  Matching formal operand class MCK_VR64 against actual operand at index 2 (): Opcode result: multiple operand mismatches, ignoring this opcode
 // CHECK:Trying to match opcode MMX_PUNPCKLBWirm
 // CHECK:  Matching formal operand class MCK_VR64 against actual operand at index 1 (): match success using generic matcher
-// CHECK:  Matching formal operand class MCK_Mem64 against actual operand at index 2 (): match success using generic matcher
+// CHECK:  Matching formal operand class MCK_Mem32 against actual operand at index 2 (): match success using generic matcher
 // CHECK:  Matching formal operand class InvalidMatchClass against actual operand at index 3: actual operand index out of range Opcode result: complete match, selecting this opcode
 
 
@@ -49,4 +49,4 @@
 crc32l    %gs:0xdeadbeef(%rbx,%rcx,8),%ecx
 
 .intel_syntax
-punpcklbw mm0, qword ptr [rsp]
+punpcklbw mm0, dword ptr [rsp]
Index: test/MC/X86/intel-syntax.s
===================================================================
--- test/MC/X86/intel-syntax.s
+++ test/MC/X86/intel-syntax.s
@@ -867,3 +867,11 @@
 xlat byte ptr [eax]
 // CHECK: xlatb
 // CHECK-STDERR: memory operand is only for determining the size, (R|E)BX will be used for the location
+
+// CHECK:   punpcklbw
+punpcklbw mm0, dword ptr [rsp]
+// CHECK:   punpcklwd
+punpcklwd mm0, dword ptr [rsp]
+// CHECK:   punpckldq
+punpckldq mm0, dword ptr [rsp]
+
Index: test/MC/X86/intel-syntax-error.s
===================================================================
--- test/MC/X86/intel-syntax-error.s
+++ test/MC/X86/intel-syntax-error.s
@@ -34,3 +34,13 @@
 lea RDX, [[arr]
 //CHECK: error: unexpected bracket encountered
 lea RDX, [arr[]
+
+.intel_syntax
+
+// CHECK: error: invalid operand for instruction
+punpcklbw mm0, qword ptr [rsp]
+// CHECK: error: invalid operand for instruction
+punpcklwd mm0, word ptr [rsp]
+// CHECK: error: invalid operand for instruction
+punpckldq mm0, qword ptr [rsp]
+
Index: lib/Target/X86/X86InstrMMX.td
===================================================================
--- lib/Target/X86/X86InstrMMX.td
+++ lib/Target/X86/X86InstrMMX.td
@@ -94,16 +94,17 @@
   // MMXI_binop_rm_int - Simple MMX binary operator based on intrinsic.
   // When this is cleaned up, remove the FIXME from X86RecognizableInstr.cpp.
   multiclass MMXI_binop_rm_int<bits<8> opc, string OpcodeStr, Intrinsic IntId,
-                               OpndItins itins, bit Commutable = 0> {
+                               OpndItins itins, bit Commutable = 0,
+                               X86MemOperand OType = i64mem> {
     def irr : MMXI<opc, MRMSrcReg, (outs VR64:$dst),
                  (ins VR64:$src1, VR64:$src2),
                  !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"),
                  [(set VR64:$dst, (IntId VR64:$src1, VR64:$src2))], itins.rr>,
               Sched<[itins.Sched]> {
       let isCommutable = Commutable;
     }
     def irm : MMXI<opc, MRMSrcMem, (outs VR64:$dst),
-                 (ins VR64:$src1, i64mem:$src2),
+                 (ins VR64:$src1, OType:$src2),
                  !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"),
                  [(set VR64:$dst, (IntId VR64:$src1,
                                    (bitconvert (load_mmx addr:$src2))))],
@@ -524,13 +525,16 @@
                                        MMX_UNPCK_H_ITINS>;
 defm MMX_PUNPCKLBW : MMXI_binop_rm_int<0x60, "punpcklbw",
                                        int_x86_mmx_punpcklbw,
-                                       MMX_UNPCK_L_ITINS>;
+                                       MMX_UNPCK_L_ITINS,
+                                       0, i32mem>;
 defm MMX_PUNPCKLWD : MMXI_binop_rm_int<0x61, "punpcklwd",
                                        int_x86_mmx_punpcklwd,
-                                       MMX_UNPCK_L_ITINS>;
+                                       MMX_UNPCK_L_ITINS,
+                                       0, i32mem>;
 defm MMX_PUNPCKLDQ : MMXI_binop_rm_int<0x62, "punpckldq",
                                        int_x86_mmx_punpckldq,
-                                       MMX_UNPCK_L_ITINS>;
+                                       MMX_UNPCK_L_ITINS,
+                                       0, i32mem>;
 
 // -- Pack Instructions
 defm MMX_PACKSSWB : MMXI_binop_rm_int<0x63, "packsswb", int_x86_mmx_packsswb,


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