[PATCH] D40360: [AArch64][SVE] Asm: Add SVE predicate register definitions and parsing support

Reid Kleckner via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Dec 18 14:28:54 PST 2017

rnk added a comment.

I added the test case in https://reviews.llvm.org/rL321029. I think you just need to try using a `pvar .req x0` directive and then using that in place of a GPR. It looks like `pvar` is treated as a predicate register after this change.


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