[PATCH] D28907: [SLP] Fix for PR30787: Failure to beneficially vectorize 'copyable' elements in integer binary ops.

[Dinar Temirbulatov via Phabricator via llvm-commits]

dtemirbulatov added inline comments.


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Comment at: lib/Transforms/Vectorize/SLPVectorizer.cpp:1583
+  unsigned AltOpcode = getAltOpcode(S.Opcode);
+  if (S.IsNonAlt) {
+    bool SkipVector = false;
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ABataev wrote:
> dtemirbulatov wrote:
> > ABataev wrote:
> > > dtemirbulatov wrote:
> > > > This is the place where we check if a vector is diverse.
> > > What are you trying to do here? What's the real problem?
> > there are two issues here:
> >        1) we could not combine remainder operation to any other operation in one vector, because of rem(interger, 1) != integer.
> >        2) sometime we could schedule non-alternative, for example, a load operation, to other for example adds and the load operation is at the bottom of BB and that could result in dominance error for a constructed vector. There are two examples in pr35497.ll 
> 1. I think you can combine it, but you cannot choose it as the main opcode. YOu need to change tryToRepresentAsInstArg to exclude reminder operations, I think.
> 2. Still don't understand. Could you give some more details?
1. done.
2. done after talking to Alexey offline.


https://reviews.llvm.org/D28907