[PATCH] D41132: CodeGen: Fix assertion in machine inst sheduler due to llvm.dbg.value

[Yaxun Liu via Phabricator via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rL320650: CodeGen: Fix assertion in machine inst sheduler due to llvm.dbg.value (authored by yaxunl, committed by ).

Changed prior to commit:
  https://reviews.llvm.org/D41132?vs=126835&id=126847#toc

Repository:
  rL LLVM

https://reviews.llvm.org/D41132

Files:
  llvm/trunk/lib/CodeGen/MachineScheduler.cpp
  llvm/trunk/lib/CodeGen/ScheduleDAGInstrs.cpp
  llvm/trunk/lib/Target/AMDGPU/GCNSchedStrategy.cpp
  llvm/trunk/test/CodeGen/AMDGPU/debug-value.ll

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