[PATCH] D41175: [X86][AVX512F_128]: Adding full coverage of MC encoding for the AVX512F_128 isa sets.<NFC>

[Craig Topper via Phabricator via llvm-commits]

craig.topper added a comment.

All of the



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Comment at: test/MC/X86/AVX512F_128N-64.s:4
+// CHECK: vextractps $0, %xmm1, 256(%rdx) 
+// CHECK: encoding: [0xc4,0xe3,0x79,0x17,0x8a,0x00,0x01,0x00,0x00,0x00]      
+vextractps $0, %xmm1, 256(%rdx) 
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This a VEX encoding which means this is an AVX1 instruction. You'l need to use xmm16-31 to trick it. This applies to lots of instructions in this patcha nd probably the 256 bit patch as well


Repository:
  rL LLVM

https://reviews.llvm.org/D41175