[PATCH] D41096: [X86] Initial support for prefer-vector-width function attribute

[Craig Topper via Phabricator via llvm-commits]

craig.topper added a comment.

@hfinkel, my goal is to get skylake-avx512 codegen as close to avx2 codegen while still allowing avx512vl features like masking, scatter, gather, etc.  The current code generated by the loop vectorizer on avx2 will contain vectors larger than 256 bits even though the TTI interface says the max width is 256. Those large vectors will be split by the legalizer in codegen.

The easiest way I see to match close to avx2 codegen is to get the type legalizer to behave as if 512-bits aren't legal so that everything will be split in a similar way. But doing that requires making sure nothing exists in the IR that truly requires 512-bit vectors. Function arguments and 512-bit x86 specific intrinsics are the big things that we can't codegen correctly with the legalizer constrained.

Lying to the legalizer would also have the effect of splitting user code that doesn't use x86 specific intrinsics and instead uses native IR.


https://reviews.llvm.org/D41096