[llvm] r320308 - [X86] Flag BroadWell scheduler model as complete
Sanjoy Das via llvm-commits
llvm-commits at lists.llvm.org
Tue Dec 12 10:42:53 PST 2017
Hi Simon,
I've reverted this commit in r320508
-- Sanjoy
On Mon, Dec 11, 2017 at 5:56 PM, Sanjoy Das
<sanjoy at playingwithpointers.com> wrote:
> Hi Simon,
>
> This commit breaks XLA:CPU -- the attached IR crashes LLVM on trunk
> when compiled as `llc -O3 -mcpu=broadwell bug.ll` after this change.
> Can you please fix or revert?
>
> Here is the backtrace:
>
> DefIdx 1 exceeds machine model writes for %53:gr64, %5:gr64 = MULX64rr
> %114, implicit killed %rdx; GR64:%53,%5,%114
> (Try with MCSchedModel.CompleteModel set to false)incomplete machine model
> UNREACHABLE executed at ../../lib/CodeGen/TargetSchedule.cpp:249!
>
> Program received signal SIGABRT, Aborted.
> 0x00007ffff67bbc37 in __GI_raise (sig=sig at entry=6) at
> ../nptl/sysdeps/unix/sysv/linux/raise.c:56
> 56 ../nptl/sysdeps/unix/sysv/linux/raise.c: No such file or directory.
> (gdb) bt
> #0 0x00007ffff67bbc37 in __GI_raise (sig=sig at entry=6) at
> ../nptl/sysdeps/unix/sysv/linux/raise.c:56
> #1 0x00007ffff67bf028 in __GI_abort () at abort.c:89
> #2 0x0000000002f3a370 in llvm::llvm_unreachable_internal
> (msg=0x7dccdb "incomplete machine model", file=0x7dcbed
> "../../lib/CodeGen/TargetSchedule.cpp", line=249)
> at ../../lib/Support/ErrorHandling.cpp:189
> #3 0x00000000024a7654 in
> llvm::TargetSchedModel::computeOperandLatency (this=0x39764d0,
> DefMI=0x393cdb0, DefOperIdx=1, UseMI=0x393d0b0, UseOperIdx=1)
> at ../../lib/CodeGen/TargetSchedule.cpp:249
> #4 0x00000000023e8da7 in llvm::ScheduleDAGInstrs::addVRegDefDeps
> (this=0x3976230, SU=0x3978060, OperIdx=1) at
> ../../lib/CodeGen/ScheduleDAGInstrs.cpp:409
> #5 0x00000000023ea4ea in llvm::ScheduleDAGInstrs::buildSchedGraph
> (this=0x3976230, AA=0x3930880, RPTracker=0x3976d70, PDiffs=0x3976c80,
> LIS=0x38ab400, TrackLaneMasks=false)
> at ../../lib/CodeGen/ScheduleDAGInstrs.cpp:803
> #6 0x0000000002270331 in
> llvm::ScheduleDAGMILive::buildDAGWithRegPressure (this=0x3976230) at
> ../../lib/CodeGen/MachineScheduler.cpp:1288
> #7 0x000000000226fa1e in llvm::ScheduleDAGMILive::schedule
> (this=0x3976230) at ../../lib/CodeGen/MachineScheduler.cpp:1194
> #8 0x0000000002279feb in (anonymous
> namespace)::MachineSchedulerBase::scheduleRegions (this=0x38abdf0,
> Scheduler=..., FixKillFlags=false)
> at ../../lib/CodeGen/MachineScheduler.cpp:564
> #9 0x0000000002279495 in (anonymous
> namespace)::MachineScheduler::runOnMachineFunction (this=0x38abdf0,
> mf=...) at ../../lib/CodeGen/MachineScheduler.cpp:383
> #10 0x000000000216b401 in llvm::MachineFunctionPass::runOnFunction
> (this=0x38abe30, F=...) at
> ../../lib/CodeGen/MachineFunctionPass.cpp:62
> #11 0x000000000267b46f in llvm::FPPassManager::runOnFunction
> (this=0x3896a80, F=...) at ../../lib/IR/LegacyPassManager.cpp:1520
> #12 0x000000000267b785 in llvm::FPPassManager::runOnModule
> (this=0x3896a80, M=...) at ../../lib/IR/LegacyPassManager.cpp:1541
> #13 0x000000000267bf1a in (anonymous
> namespace)::MPPassManager::runOnModule (this=0x387bf60, M=...) at
> ../../lib/IR/LegacyPassManager.cpp:1597
> #14 0x000000000267ba46 in llvm::legacy::PassManagerImpl::run
> (this=0x387d780, M=...) at ../../lib/IR/LegacyPassManager.cpp:1700
> #15 0x000000000267c431 in llvm::legacy::PassManager::run
> (this=0x7fffffffd7d0, M=...) at
> ../../lib/IR/LegacyPassManager.cpp:1731
> #16 0x00000000017e721d in compileModule (argv=0x7fffffffdec8,
> Context=...) at ../../tools/llc/llc.cpp:569
> #17 0x00000000017e587a in main (argc=4, argv=0x7fffffffdec8) at
> ../../tools/llc/llc.cpp:346
>
>
> -- Sanjoy
>
> On Sun, Dec 10, 2017 at 5:49 AM, Simon Pilgrim via llvm-commits
> <llvm-commits at lists.llvm.org> wrote:
>> Author: rksimon
>> Date: Sun Dec 10 05:49:51 2017
>> New Revision: 320308
>>
>> URL: http://llvm.org/viewvc/llvm-project?rev=320308&view=rev
>> Log:
>> [X86] Flag BroadWell scheduler model as complete
>>
>> Locally tag COPY as WriteMove, which has caused some reg-reg + reg-mem instruction tests to reorder.
>>
>> Modified:
>> llvm/trunk/lib/Target/X86/X86SchedBroadwell.td
>> llvm/trunk/test/CodeGen/X86/aes-schedule.ll
>> llvm/trunk/test/CodeGen/X86/avx-schedule.ll
>> llvm/trunk/test/CodeGen/X86/avx2-schedule.ll
>> llvm/trunk/test/CodeGen/X86/mmx-schedule.ll
>> llvm/trunk/test/CodeGen/X86/sse-schedule.ll
>> llvm/trunk/test/CodeGen/X86/sse2-schedule.ll
>> llvm/trunk/test/CodeGen/X86/sse41-schedule.ll
>>
>> Modified: llvm/trunk/lib/Target/X86/X86SchedBroadwell.td
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86SchedBroadwell.td?rev=320308&r1=320307&r2=320308&view=diff
>> ==============================================================================
>> --- llvm/trunk/lib/Target/X86/X86SchedBroadwell.td (original)
>> +++ llvm/trunk/lib/Target/X86/X86SchedBroadwell.td Sun Dec 10 05:49:51 2017
>> @@ -21,10 +21,6 @@ def BroadwellModel : SchedMachineModel {
>>
>> // Based on the LSD (loop-stream detector) queue size and benchmarking data.
>> let LoopMicroOpBufferSize = 50;
>> -
>> - // This flag is set to allow the scheduler to assign a default model to
>> - // unrecognized opcodes.
>> - let CompleteModel = 0;
>> }
>>
>> let SchedModel = BroadwellModel in {
>> @@ -120,6 +116,9 @@ def : WriteRes<WriteMove, [BWPort0156]>
>> // These can often bypass execution ports completely.
>> def : WriteRes<WriteZero, []>;
>>
>> +// Treat misc copies as a move.
>> +def : InstRW<[WriteMove], (instrs COPY)>;
>> +
>> // Branches don't produce values, so they have no latency, but they still
>> // consume resources. Indirect branches can fold loads.
>> defm : BWWriteResPair<WriteJump, BWPort06, 1>;
>>
>> Modified: llvm/trunk/test/CodeGen/X86/aes-schedule.ll
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/aes-schedule.ll?rev=320308&r1=320307&r2=320308&view=diff
>> ==============================================================================
>> --- llvm/trunk/test/CodeGen/X86/aes-schedule.ll (original)
>> +++ llvm/trunk/test/CodeGen/X86/aes-schedule.ll Sun Dec 10 05:49:51 2017
>> @@ -261,8 +261,8 @@ define <2 x i64> @test_aesimc(<2 x i64>
>> ;
>> ; BROADWELL-LABEL: test_aesimc:
>> ; BROADWELL: # %bb.0:
>> -; BROADWELL-NEXT: vaesimc %xmm0, %xmm0 # sched: [14:2.00]
>> ; BROADWELL-NEXT: vaesimc (%rdi), %xmm1 # sched: [19:2.00]
>> +; BROADWELL-NEXT: vaesimc %xmm0, %xmm0 # sched: [14:2.00]
>> ; BROADWELL-NEXT: vpor %xmm1, %xmm0, %xmm0 # sched: [1:0.33]
>> ; BROADWELL-NEXT: retq # sched: [7:1.00]
>> ;
>>
>> Modified: llvm/trunk/test/CodeGen/X86/avx-schedule.ll
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/avx-schedule.ll?rev=320308&r1=320307&r2=320308&view=diff
>> ==============================================================================
>> --- llvm/trunk/test/CodeGen/X86/avx-schedule.ll (original)
>> +++ llvm/trunk/test/CodeGen/X86/avx-schedule.ll Sun Dec 10 05:49:51 2017
>> @@ -1069,8 +1069,8 @@ define <4 x double> @test_cvtdq2pd(<4 x
>> ;
>> ; BROADWELL-LABEL: test_cvtdq2pd:
>> ; BROADWELL: # %bb.0:
>> -; BROADWELL-NEXT: vcvtdq2pd %xmm0, %ymm0 # sched: [6:1.00]
>> ; BROADWELL-NEXT: vcvtdq2pd (%rdi), %ymm1 # sched: [11:1.00]
>> +; BROADWELL-NEXT: vcvtdq2pd %xmm0, %ymm0 # sched: [6:1.00]
>> ; BROADWELL-NEXT: vaddpd %ymm1, %ymm0, %ymm0 # sched: [3:1.00]
>> ; BROADWELL-NEXT: retq # sched: [7:1.00]
>> ;
>> @@ -4035,8 +4035,8 @@ define <8 x float> @test_rcpps(<8 x floa
>> ;
>> ; BROADWELL-LABEL: test_rcpps:
>> ; BROADWELL: # %bb.0:
>> -; BROADWELL-NEXT: vrcpps (%rdi), %ymm1 # sched: [17:2.00]
>> ; BROADWELL-NEXT: vrcpps %ymm0, %ymm0 # sched: [11:2.00]
>> +; BROADWELL-NEXT: vrcpps (%rdi), %ymm1 # sched: [17:2.00]
>> ; BROADWELL-NEXT: vaddps %ymm1, %ymm0, %ymm0 # sched: [3:1.00]
>> ; BROADWELL-NEXT: retq # sched: [7:1.00]
>> ;
>> @@ -4099,8 +4099,8 @@ define <4 x double> @test_roundpd(<4 x d
>> ;
>> ; BROADWELL-LABEL: test_roundpd:
>> ; BROADWELL: # %bb.0:
>> -; BROADWELL-NEXT: vroundpd $7, %ymm0, %ymm0 # sched: [6:0.50]
>> ; BROADWELL-NEXT: vroundpd $7, (%rdi), %ymm1 # sched: [12:2.00]
>> +; BROADWELL-NEXT: vroundpd $7, %ymm0, %ymm0 # sched: [6:0.50]
>> ; BROADWELL-NEXT: vaddpd %ymm1, %ymm0, %ymm0 # sched: [3:1.00]
>> ; BROADWELL-NEXT: retq # sched: [7:1.00]
>> ;
>> @@ -4163,8 +4163,8 @@ define <8 x float> @test_roundps(<8 x fl
>> ;
>> ; BROADWELL-LABEL: test_roundps:
>> ; BROADWELL: # %bb.0:
>> -; BROADWELL-NEXT: vroundps $7, %ymm0, %ymm0 # sched: [6:0.50]
>> ; BROADWELL-NEXT: vroundps $7, (%rdi), %ymm1 # sched: [12:2.00]
>> +; BROADWELL-NEXT: vroundps $7, %ymm0, %ymm0 # sched: [6:0.50]
>> ; BROADWELL-NEXT: vaddps %ymm1, %ymm0, %ymm0 # sched: [3:1.00]
>> ; BROADWELL-NEXT: retq # sched: [7:1.00]
>> ;
>> @@ -4227,8 +4227,8 @@ define <8 x float> @test_rsqrtps(<8 x fl
>> ;
>> ; BROADWELL-LABEL: test_rsqrtps:
>> ; BROADWELL: # %bb.0:
>> -; BROADWELL-NEXT: vrsqrtps (%rdi), %ymm1 # sched: [17:2.00]
>> ; BROADWELL-NEXT: vrsqrtps %ymm0, %ymm0 # sched: [11:2.00]
>> +; BROADWELL-NEXT: vrsqrtps (%rdi), %ymm1 # sched: [17:2.00]
>> ; BROADWELL-NEXT: vaddps %ymm1, %ymm0, %ymm0 # sched: [3:1.00]
>> ; BROADWELL-NEXT: retq # sched: [7:1.00]
>> ;
>> @@ -4408,8 +4408,8 @@ define <4 x double> @test_sqrtpd(<4 x do
>> ;
>> ; BROADWELL-LABEL: test_sqrtpd:
>> ; BROADWELL: # %bb.0:
>> -; BROADWELL-NEXT: vsqrtpd (%rdi), %ymm1 # sched: [40:2.00]
>> ; BROADWELL-NEXT: vsqrtpd %ymm0, %ymm0 # sched: [34:2.00]
>> +; BROADWELL-NEXT: vsqrtpd (%rdi), %ymm1 # sched: [40:2.00]
>> ; BROADWELL-NEXT: vaddpd %ymm1, %ymm0, %ymm0 # sched: [3:1.00]
>> ; BROADWELL-NEXT: retq # sched: [7:1.00]
>> ;
>> @@ -4472,8 +4472,8 @@ define <8 x float> @test_sqrtps(<8 x flo
>> ;
>> ; BROADWELL-LABEL: test_sqrtps:
>> ; BROADWELL: # %bb.0:
>> -; BROADWELL-NEXT: vsqrtps (%rdi), %ymm1 # sched: [27:2.00]
>> ; BROADWELL-NEXT: vsqrtps %ymm0, %ymm0 # sched: [21:2.00]
>> +; BROADWELL-NEXT: vsqrtps (%rdi), %ymm1 # sched: [27:2.00]
>> ; BROADWELL-NEXT: vaddps %ymm1, %ymm0, %ymm0 # sched: [3:1.00]
>> ; BROADWELL-NEXT: retq # sched: [7:1.00]
>> ;
>>
>> Modified: llvm/trunk/test/CodeGen/X86/avx2-schedule.ll
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/avx2-schedule.ll?rev=320308&r1=320307&r2=320308&view=diff
>> ==============================================================================
>> --- llvm/trunk/test/CodeGen/X86/avx2-schedule.ll (original)
>> +++ llvm/trunk/test/CodeGen/X86/avx2-schedule.ll Sun Dec 10 05:49:51 2017
>> @@ -1761,8 +1761,8 @@ define <16 x i8> @test_pbroadcastb(<16 x
>> ;
>> ; BROADWELL-LABEL: test_pbroadcastb:
>> ; BROADWELL: # %bb.0:
>> -; BROADWELL-NEXT: vpbroadcastb %xmm0, %xmm0 # sched: [3:1.00]
>> ; BROADWELL-NEXT: vpbroadcastb (%rdi), %xmm1 # sched: [9:1.00]
>> +; BROADWELL-NEXT: vpbroadcastb %xmm0, %xmm0 # sched: [3:1.00]
>> ; BROADWELL-NEXT: vpaddb %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
>> ; BROADWELL-NEXT: retq # sched: [7:1.00]
>> ;
>> @@ -1810,8 +1810,8 @@ define <32 x i8> @test_pbroadcastb_ymm(<
>> ;
>> ; BROADWELL-LABEL: test_pbroadcastb_ymm:
>> ; BROADWELL: # %bb.0:
>> -; BROADWELL-NEXT: vpbroadcastb %xmm0, %ymm0 # sched: [3:1.00]
>> ; BROADWELL-NEXT: vpbroadcastb (%rdi), %ymm1 # sched: [9:1.00]
>> +; BROADWELL-NEXT: vpbroadcastb %xmm0, %ymm0 # sched: [3:1.00]
>> ; BROADWELL-NEXT: vpaddb %ymm1, %ymm0, %ymm0 # sched: [1:0.50]
>> ; BROADWELL-NEXT: retq # sched: [7:1.00]
>> ;
>> @@ -2051,8 +2051,8 @@ define <8 x i16> @test_pbroadcastw(<8 x
>> ;
>> ; BROADWELL-LABEL: test_pbroadcastw:
>> ; BROADWELL: # %bb.0:
>> -; BROADWELL-NEXT: vpbroadcastw %xmm0, %xmm0 # sched: [3:1.00]
>> ; BROADWELL-NEXT: vpbroadcastw (%rdi), %xmm1 # sched: [9:1.00]
>> +; BROADWELL-NEXT: vpbroadcastw %xmm0, %xmm0 # sched: [3:1.00]
>> ; BROADWELL-NEXT: vpaddw %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
>> ; BROADWELL-NEXT: retq # sched: [7:1.00]
>> ;
>> @@ -2100,8 +2100,8 @@ define <16 x i16> @test_pbroadcastw_ymm(
>> ;
>> ; BROADWELL-LABEL: test_pbroadcastw_ymm:
>> ; BROADWELL: # %bb.0:
>> -; BROADWELL-NEXT: vpbroadcastw %xmm0, %ymm0 # sched: [3:1.00]
>> ; BROADWELL-NEXT: vpbroadcastw (%rdi), %ymm1 # sched: [9:1.00]
>> +; BROADWELL-NEXT: vpbroadcastw %xmm0, %ymm0 # sched: [3:1.00]
>> ; BROADWELL-NEXT: vpaddw %ymm1, %ymm0, %ymm0 # sched: [1:0.50]
>> ; BROADWELL-NEXT: retq # sched: [7:1.00]
>> ;
>>
>> Modified: llvm/trunk/test/CodeGen/X86/mmx-schedule.ll
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/mmx-schedule.ll?rev=320308&r1=320307&r2=320308&view=diff
>> ==============================================================================
>> --- llvm/trunk/test/CodeGen/X86/mmx-schedule.ll (original)
>> +++ llvm/trunk/test/CodeGen/X86/mmx-schedule.ll Sun Dec 10 05:49:51 2017
>> @@ -54,10 +54,10 @@ define i64 @test_cvtpd2pi(<2 x double> %
>> ;
>> ; BROADWELL-LABEL: test_cvtpd2pi:
>> ; BROADWELL: # %bb.0:
>> -; BROADWELL-NEXT: cvtpd2pi (%rdi), %mm0 # sched: [9:1.00]
>> -; BROADWELL-NEXT: cvtpd2pi %xmm0, %mm1 # sched: [4:1.00]
>> -; BROADWELL-NEXT: por %mm1, %mm0 # sched: [1:0.33]
>> -; BROADWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
>> +; BROADWELL-NEXT: cvtpd2pi %xmm0, %mm0 # sched: [4:1.00]
>> +; BROADWELL-NEXT: cvtpd2pi (%rdi), %mm1 # sched: [9:1.00]
>> +; BROADWELL-NEXT: por %mm0, %mm1 # sched: [1:0.33]
>> +; BROADWELL-NEXT: movd %mm1, %rax # sched: [1:1.00]
>> ; BROADWELL-NEXT: retq # sched: [7:1.00]
>> ;
>> ; SKYLAKE-LABEL: test_cvtpd2pi:
>> @@ -138,9 +138,9 @@ define <2 x double> @test_cvtpi2pd(x86_m
>> ;
>> ; BROADWELL-LABEL: test_cvtpi2pd:
>> ; BROADWELL: # %bb.0:
>> -; BROADWELL-NEXT: cvtpi2pd %mm0, %xmm0 # sched: [4:1.00]
>> -; BROADWELL-NEXT: cvtpi2pd (%rdi), %xmm1 # sched: [9:1.00]
>> -; BROADWELL-NEXT: vaddpd %xmm1, %xmm0, %xmm0 # sched: [3:1.00]
>> +; BROADWELL-NEXT: cvtpi2pd (%rdi), %xmm0 # sched: [9:1.00]
>> +; BROADWELL-NEXT: cvtpi2pd %mm0, %xmm1 # sched: [4:1.00]
>> +; BROADWELL-NEXT: vaddpd %xmm0, %xmm1, %xmm0 # sched: [3:1.00]
>> ; BROADWELL-NEXT: retq # sched: [7:1.00]
>> ;
>> ; SKYLAKE-LABEL: test_cvtpi2pd:
>> @@ -388,10 +388,10 @@ define i64 @test_cvttpd2pi(<2 x double>
>> ;
>> ; BROADWELL-LABEL: test_cvttpd2pi:
>> ; BROADWELL: # %bb.0:
>> -; BROADWELL-NEXT: cvttpd2pi (%rdi), %mm0 # sched: [9:1.00]
>> -; BROADWELL-NEXT: cvttpd2pi %xmm0, %mm1 # sched: [4:1.00]
>> -; BROADWELL-NEXT: por %mm1, %mm0 # sched: [1:0.33]
>> -; BROADWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
>> +; BROADWELL-NEXT: cvttpd2pi %xmm0, %mm0 # sched: [4:1.00]
>> +; BROADWELL-NEXT: cvttpd2pi (%rdi), %mm1 # sched: [9:1.00]
>> +; BROADWELL-NEXT: por %mm0, %mm1 # sched: [1:0.33]
>> +; BROADWELL-NEXT: movd %mm1, %rax # sched: [1:1.00]
>> ; BROADWELL-NEXT: retq # sched: [7:1.00]
>> ;
>> ; SKYLAKE-LABEL: test_cvttpd2pi:
>>
>> Modified: llvm/trunk/test/CodeGen/X86/sse-schedule.ll
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/sse-schedule.ll?rev=320308&r1=320307&r2=320308&view=diff
>> ==============================================================================
>> --- llvm/trunk/test/CodeGen/X86/sse-schedule.ll (original)
>> +++ llvm/trunk/test/CodeGen/X86/sse-schedule.ll Sun Dec 10 05:49:51 2017
>> @@ -784,8 +784,8 @@ define i32 @test_cvtss2si(float %a0, flo
>> ;
>> ; BROADWELL-LABEL: test_cvtss2si:
>> ; BROADWELL: # %bb.0:
>> -; BROADWELL-NEXT: vcvtss2si %xmm0, %ecx # sched: [4:1.00]
>> ; BROADWELL-NEXT: vcvtss2si (%rdi), %eax # sched: [9:1.00]
>> +; BROADWELL-NEXT: vcvtss2si %xmm0, %ecx # sched: [4:1.00]
>> ; BROADWELL-NEXT: addl %ecx, %eax # sched: [1:0.25]
>> ; BROADWELL-NEXT: retq # sched: [7:1.00]
>> ;
>> @@ -864,8 +864,8 @@ define i64 @test_cvtss2siq(float %a0, fl
>> ;
>> ; BROADWELL-LABEL: test_cvtss2siq:
>> ; BROADWELL: # %bb.0:
>> -; BROADWELL-NEXT: vcvtss2si %xmm0, %rcx # sched: [4:1.00]
>> ; BROADWELL-NEXT: vcvtss2si (%rdi), %rax # sched: [9:1.00]
>> +; BROADWELL-NEXT: vcvtss2si %xmm0, %rcx # sched: [4:1.00]
>> ; BROADWELL-NEXT: addq %rcx, %rax # sched: [1:0.25]
>> ; BROADWELL-NEXT: retq # sched: [7:1.00]
>> ;
>> @@ -944,8 +944,8 @@ define i32 @test_cvttss2si(float %a0, fl
>> ;
>> ; BROADWELL-LABEL: test_cvttss2si:
>> ; BROADWELL: # %bb.0:
>> -; BROADWELL-NEXT: vcvttss2si %xmm0, %ecx # sched: [4:1.00]
>> ; BROADWELL-NEXT: vcvttss2si (%rdi), %eax # sched: [9:1.00]
>> +; BROADWELL-NEXT: vcvttss2si %xmm0, %ecx # sched: [4:1.00]
>> ; BROADWELL-NEXT: addl %ecx, %eax # sched: [1:0.25]
>> ; BROADWELL-NEXT: retq # sched: [7:1.00]
>> ;
>> @@ -1021,8 +1021,8 @@ define i64 @test_cvttss2siq(float %a0, f
>> ;
>> ; BROADWELL-LABEL: test_cvttss2siq:
>> ; BROADWELL: # %bb.0:
>> -; BROADWELL-NEXT: vcvttss2si %xmm0, %rcx # sched: [4:1.00]
>> ; BROADWELL-NEXT: vcvttss2si (%rdi), %rax # sched: [9:1.00]
>> +; BROADWELL-NEXT: vcvttss2si %xmm0, %rcx # sched: [4:1.00]
>> ; BROADWELL-NEXT: addq %rcx, %rax # sched: [1:0.25]
>> ; BROADWELL-NEXT: retq # sched: [7:1.00]
>> ;
>>
>> Modified: llvm/trunk/test/CodeGen/X86/sse2-schedule.ll
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/sse2-schedule.ll?rev=320308&r1=320307&r2=320308&view=diff
>> ==============================================================================
>> --- llvm/trunk/test/CodeGen/X86/sse2-schedule.ll (original)
>> +++ llvm/trunk/test/CodeGen/X86/sse2-schedule.ll Sun Dec 10 05:49:51 2017
>> @@ -705,8 +705,8 @@ define <2 x double> @test_cvtdq2pd(<4 x
>> ;
>> ; BROADWELL-LABEL: test_cvtdq2pd:
>> ; BROADWELL: # %bb.0:
>> -; BROADWELL-NEXT: vcvtdq2pd %xmm0, %xmm0 # sched: [4:1.00]
>> ; BROADWELL-NEXT: vcvtdq2pd (%rdi), %xmm1 # sched: [9:1.00]
>> +; BROADWELL-NEXT: vcvtdq2pd %xmm0, %xmm0 # sched: [4:1.00]
>> ; BROADWELL-NEXT: vaddpd %xmm1, %xmm0, %xmm0 # sched: [3:1.00]
>> ; BROADWELL-NEXT: retq # sched: [7:1.00]
>> ;
>> @@ -1179,8 +1179,8 @@ define i32 @test_cvtsd2si(double %a0, do
>> ;
>> ; BROADWELL-LABEL: test_cvtsd2si:
>> ; BROADWELL: # %bb.0:
>> -; BROADWELL-NEXT: vcvtsd2si %xmm0, %ecx # sched: [4:1.00]
>> ; BROADWELL-NEXT: vcvtsd2si (%rdi), %eax # sched: [9:1.00]
>> +; BROADWELL-NEXT: vcvtsd2si %xmm0, %ecx # sched: [4:1.00]
>> ; BROADWELL-NEXT: addl %ecx, %eax # sched: [1:0.25]
>> ; BROADWELL-NEXT: retq # sched: [7:1.00]
>> ;
>> @@ -1259,8 +1259,8 @@ define i64 @test_cvtsd2siq(double %a0, d
>> ;
>> ; BROADWELL-LABEL: test_cvtsd2siq:
>> ; BROADWELL: # %bb.0:
>> -; BROADWELL-NEXT: vcvtsd2si %xmm0, %rcx # sched: [4:1.00]
>> ; BROADWELL-NEXT: vcvtsd2si (%rdi), %rax # sched: [9:1.00]
>> +; BROADWELL-NEXT: vcvtsd2si %xmm0, %rcx # sched: [4:1.00]
>> ; BROADWELL-NEXT: addq %rcx, %rax # sched: [1:0.25]
>> ; BROADWELL-NEXT: retq # sched: [7:1.00]
>> ;
>> @@ -1829,8 +1829,8 @@ define i32 @test_cvttsd2si(double %a0, d
>> ;
>> ; BROADWELL-LABEL: test_cvttsd2si:
>> ; BROADWELL: # %bb.0:
>> -; BROADWELL-NEXT: vcvttsd2si %xmm0, %ecx # sched: [4:1.00]
>> ; BROADWELL-NEXT: vcvttsd2si (%rdi), %eax # sched: [9:1.00]
>> +; BROADWELL-NEXT: vcvttsd2si %xmm0, %ecx # sched: [4:1.00]
>> ; BROADWELL-NEXT: addl %ecx, %eax # sched: [1:0.25]
>> ; BROADWELL-NEXT: retq # sched: [7:1.00]
>> ;
>> @@ -1906,8 +1906,8 @@ define i64 @test_cvttsd2siq(double %a0,
>> ;
>> ; BROADWELL-LABEL: test_cvttsd2siq:
>> ; BROADWELL: # %bb.0:
>> -; BROADWELL-NEXT: vcvttsd2si %xmm0, %rcx # sched: [4:1.00]
>> ; BROADWELL-NEXT: vcvttsd2si (%rdi), %rax # sched: [9:1.00]
>> +; BROADWELL-NEXT: vcvttsd2si %xmm0, %rcx # sched: [4:1.00]
>> ; BROADWELL-NEXT: addq %rcx, %rax # sched: [1:0.25]
>> ; BROADWELL-NEXT: retq # sched: [7:1.00]
>> ;
>>
>> Modified: llvm/trunk/test/CodeGen/X86/sse41-schedule.ll
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/sse41-schedule.ll?rev=320308&r1=320307&r2=320308&view=diff
>> ==============================================================================
>> --- llvm/trunk/test/CodeGen/X86/sse41-schedule.ll (original)
>> +++ llvm/trunk/test/CodeGen/X86/sse41-schedule.ll Sun Dec 10 05:49:51 2017
>> @@ -2992,8 +2992,8 @@ define <2 x double> @test_roundpd(<2 x d
>> ;
>> ; BROADWELL-LABEL: test_roundpd:
>> ; BROADWELL: # %bb.0:
>> -; BROADWELL-NEXT: vroundpd $7, %xmm0, %xmm0 # sched: [6:0.50]
>> ; BROADWELL-NEXT: vroundpd $7, (%rdi), %xmm1 # sched: [11:2.00]
>> +; BROADWELL-NEXT: vroundpd $7, %xmm0, %xmm0 # sched: [6:0.50]
>> ; BROADWELL-NEXT: vaddpd %xmm1, %xmm0, %xmm0 # sched: [3:1.00]
>> ; BROADWELL-NEXT: retq # sched: [7:1.00]
>> ;
>> @@ -3064,8 +3064,8 @@ define <4 x float> @test_roundps(<4 x fl
>> ;
>> ; BROADWELL-LABEL: test_roundps:
>> ; BROADWELL: # %bb.0:
>> -; BROADWELL-NEXT: vroundps $7, %xmm0, %xmm0 # sched: [6:0.50]
>> ; BROADWELL-NEXT: vroundps $7, (%rdi), %xmm1 # sched: [11:2.00]
>> +; BROADWELL-NEXT: vroundps $7, %xmm0, %xmm0 # sched: [6:0.50]
>> ; BROADWELL-NEXT: vaddps %xmm1, %xmm0, %xmm0 # sched: [3:1.00]
>> ; BROADWELL-NEXT: retq # sched: [7:1.00]
>> ;
>> @@ -3137,9 +3137,9 @@ define <2 x double> @test_roundsd(<2 x d
>> ;
>> ; BROADWELL-LABEL: test_roundsd:
>> ; BROADWELL: # %bb.0:
>> -; BROADWELL-NEXT: vroundsd $7, %xmm1, %xmm0, %xmm1 # sched: [6:0.50]
>> -; BROADWELL-NEXT: vroundsd $7, (%rdi), %xmm0, %xmm0 # sched: [11:2.00]
>> -; BROADWELL-NEXT: vaddpd %xmm0, %xmm1, %xmm0 # sched: [3:1.00]
>> +; BROADWELL-NEXT: vroundsd $7, (%rdi), %xmm0, %xmm2 # sched: [11:2.00]
>> +; BROADWELL-NEXT: vroundsd $7, %xmm1, %xmm0, %xmm0 # sched: [6:0.50]
>> +; BROADWELL-NEXT: vaddpd %xmm2, %xmm0, %xmm0 # sched: [3:1.00]
>> ; BROADWELL-NEXT: retq # sched: [7:1.00]
>> ;
>> ; SKYLAKE-LABEL: test_roundsd:
>> @@ -3210,9 +3210,9 @@ define <4 x float> @test_roundss(<4 x fl
>> ;
>> ; BROADWELL-LABEL: test_roundss:
>> ; BROADWELL: # %bb.0:
>> -; BROADWELL-NEXT: vroundss $7, %xmm1, %xmm0, %xmm1 # sched: [6:0.50]
>> -; BROADWELL-NEXT: vroundss $7, (%rdi), %xmm0, %xmm0 # sched: [11:2.00]
>> -; BROADWELL-NEXT: vaddps %xmm0, %xmm1, %xmm0 # sched: [3:1.00]
>> +; BROADWELL-NEXT: vroundss $7, (%rdi), %xmm0, %xmm2 # sched: [11:2.00]
>> +; BROADWELL-NEXT: vroundss $7, %xmm1, %xmm0, %xmm0 # sched: [6:0.50]
>> +; BROADWELL-NEXT: vaddps %xmm2, %xmm0, %xmm0 # sched: [3:1.00]
>> ; BROADWELL-NEXT: retq # sched: [7:1.00]
>> ;
>> ; SKYLAKE-LABEL: test_roundss:
>>
>>
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