[llvm] r320507 - [X86] Add a couple TODOs about missing coverage/features motivated by D40335

[Craig Topper via llvm-commits]

Author: ctopper
Date: Tue Dec 12 10:39:04 2017
New Revision: 320507

URL: http://llvm.org/viewvc/llvm-project?rev=320507&view=rev
Log:
[X86] Add a couple TODOs about missing coverage/features motivated by D40335

D40335 was wanting to add FMSUBADD support, but it discovered that there are two pieces of code to make FMADDSUB and only one of those is tested. So I've asked that review to implement the one path until we get tests that test the existing code.

Modified:
    llvm/trunk/lib/Target/X86/X86ISelLowering.cpp

Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=320507&r1=320506&r2=320507&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Tue Dec 12 10:39:04 2017
@@ -7499,6 +7499,8 @@ static SDValue lowerToAddSubOrFMAddSub(c
 
   // Try to generate X86ISD::FMADDSUB node here.
   SDValue Opnd2;
+  // TODO: According to coverage reports, the FMADDSUB transform is not
+  // triggered by any tests.
   if (isFMAddSub(Subtarget, DAG, Opnd0, Opnd1, Opnd2))
     return DAG.getNode(X86ISD::FMADDSUB, DL, VT, Opnd0, Opnd1, Opnd2);
 
@@ -7844,6 +7846,8 @@ X86TargetLowering::LowerBUILD_VECTOR(SDV
     return VectorConstant;
 
   BuildVectorSDNode *BV = cast<BuildVectorSDNode>(Op.getNode());
+  // TODO: Support FMSUBADD here if we ever get tests for the FMADDSUB
+  // transform here.
   if (SDValue AddSub = lowerToAddSubOrFMAddSub(BV, Subtarget, DAG))
     return AddSub;
   if (SDValue HorizontalOp = LowerToHorizontalOp(BV, Subtarget, DAG))