[PATCH] D39849: [RISCV] Implement prolog and epilog insertion

[Alex Bradbury via Phabricator via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rL320357: [RISCV] Implement prolog and epilog insertion (authored by asb).

Changed prior to commit:
  https://reviews.llvm.org/D39849?vs=126295&id=126338#toc

Repository:
  rL LLVM

https://reviews.llvm.org/D39849

Files:
  llvm/trunk/lib/Target/RISCV/RISCVFrameLowering.cpp
  llvm/trunk/lib/Target/RISCV/RISCVFrameLowering.h
  llvm/trunk/test/CodeGen/RISCV/addc-adde-sube-subc.ll
  llvm/trunk/test/CodeGen/RISCV/alu32.ll
  llvm/trunk/test/CodeGen/RISCV/bare-select.ll
  llvm/trunk/test/CodeGen/RISCV/blockaddress.ll
  llvm/trunk/test/CodeGen/RISCV/branch.ll
  llvm/trunk/test/CodeGen/RISCV/bswap-ctlz-cttz-ctpop.ll
  llvm/trunk/test/CodeGen/RISCV/calls.ll
  llvm/trunk/test/CodeGen/RISCV/div.ll
  llvm/trunk/test/CodeGen/RISCV/frame.ll
  llvm/trunk/test/CodeGen/RISCV/i32-icmp.ll
  llvm/trunk/test/CodeGen/RISCV/imm.ll
  llvm/trunk/test/CodeGen/RISCV/indirectbr.ll
  llvm/trunk/test/CodeGen/RISCV/jumptable.ll
  llvm/trunk/test/CodeGen/RISCV/mem.ll
  llvm/trunk/test/CodeGen/RISCV/mul.ll
  llvm/trunk/test/CodeGen/RISCV/rem.ll
  llvm/trunk/test/CodeGen/RISCV/rotl-rotr.ll
  llvm/trunk/test/CodeGen/RISCV/select-cc.ll
  llvm/trunk/test/CodeGen/RISCV/sext-zext-trunc.ll
  llvm/trunk/test/CodeGen/RISCV/shifts.ll
  llvm/trunk/test/CodeGen/RISCV/wide-mem.ll

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