[llvm] r320344 - [DAGCombiner] Support folding (mulhs/u X, 0)->0 for vectors.

[Craig Topper via llvm-commits]

Author: ctopper
Date: Mon Dec 11 00:33:20 2017
New Revision: 320344

URL: http://llvm.org/viewvc/llvm-project?rev=320344&view=rev
Log:
[DAGCombiner] Support folding (mulhs/u X, 0)->0 for vectors.

We should probably also fold (mulhs/u X, 1) for vectors, but that's harder.

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    llvm/trunk/test/CodeGen/X86/pr34855.ll

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp?rev=320344&r1=320343&r2=320344&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Mon Dec 11 00:33:20 2017
@@ -3099,6 +3099,14 @@ SDValue DAGCombiner::visitMULHS(SDNode *
   EVT VT = N->getValueType(0);
   SDLoc DL(N);
 
+  if (VT.isVector()) {
+    // fold (mulhs x, 0) -> 0
+    if (ISD::isBuildVectorAllZeros(N1.getNode()))
+      return N1;
+    if (ISD::isBuildVectorAllZeros(N0.getNode()))
+      return N0;
+  }
+
   // fold (mulhs x, 0) -> 0
   if (isNullConstant(N1))
     return N1;
@@ -3138,6 +3146,14 @@ SDValue DAGCombiner::visitMULHU(SDNode *
   EVT VT = N->getValueType(0);
   SDLoc DL(N);
 
+  if (VT.isVector()) {
+    // fold (mulhu x, 0) -> 0
+    if (ISD::isBuildVectorAllZeros(N1.getNode()))
+      return N1;
+    if (ISD::isBuildVectorAllZeros(N0.getNode()))
+      return N0;
+  }
+
   // fold (mulhu x, 0) -> 0
   if (isNullConstant(N1))
     return N1;

Modified: llvm/trunk/test/CodeGen/X86/pr34855.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr34855.ll?rev=320344&r1=320343&r2=320344&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr34855.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr34855.ll Mon Dec 11 00:33:20 2017
@@ -8,18 +8,13 @@ define void @PR34855(<2 x i32> *%p0, <2
 ; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
 ; X86-NEXT:    movl {{[0-9]+}}(%esp), %ecx
 ; X86-NEXT:    movsd {{.*#+}} xmm0 = mem[0],zero
-; X86-NEXT:    movlps %xmm0, (%eax)
+; X86-NEXT:    movsd %xmm0, (%eax)
 ; X86-NEXT:    retl
 ;
 ; X64-LABEL: PR34855:
 ; X64:       # %bb.0:
-; X64-NEXT:    movslq 4(%rdi), %rax
-; X64-NEXT:    movq %rax, %xmm0
-; X64-NEXT:    movslq (%rdi), %rax
-; X64-NEXT:    movq %rax, %xmm1
-; X64-NEXT:    punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm0[0]
-; X64-NEXT:    pshufd {{.*#+}} xmm0 = xmm1[0,2,2,3]
-; X64-NEXT:    movq %xmm0, (%rdx)
+; X64-NEXT:    movq (%rdi), %rax
+; X64-NEXT:    movq %rax, (%rdx)
 ; X64-NEXT:    retq
   %tmp = load <2 x i32>, <2 x i32>* %p0, align 8
   %tmp1 = load <2 x i32>, <2 x i32>* %p1, align 8