[llvm] r320273 - [X86] Tag ALLOCA/VAARG instructions as system scheduler classes

[Simon Pilgrim via llvm-commits]

Author: rksimon
Date: Sat Dec  9 16:03:16 2017
New Revision: 320273

URL: http://llvm.org/viewvc/llvm-project?rev=320273&view=rev
Log:
[X86] Tag ALLOCA/VAARG instructions as system scheduler classes

Modified:
    llvm/trunk/lib/Target/X86/X86InstrCompiler.td

Modified: llvm/trunk/lib/Target/X86/X86InstrCompiler.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrCompiler.td?rev=320273&r1=320272&r2=320273&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrCompiler.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrCompiler.td Sat Dec  9 16:03:16 2017
@@ -76,6 +76,7 @@ def ADJCALLSTACKUP64   : I<0, Pseudo, (o
 def : Pat<(X86callseq_start timm:$amt1, timm:$amt2),
         (ADJCALLSTACKDOWN64 i32imm:$amt1, i32imm:$amt2, 0)>, Requires<[IsLP64]>;
 
+let SchedRW = [WriteSystem] in {
 
 // x86-64 va_start lowering magic.
 let usesCustomInserter = 1, Defs = [EFLAGS] in {
@@ -141,6 +142,7 @@ def WIN_ALLOCA_64 : I<0, Pseudo, (outs),
                      "# dynamic stack allocation",
                      [(X86WinAlloca GR64:$size)]>,
                      Requires<[In64BitMode]>;
+} // SchedRW
 
 // These instructions XOR the frame pointer into a GPR. They are used in some
 // stack protection schemes. These are post-RA pseudos because we only know the