[llvm] r320156 - [X86][AVX512] Tag CLWB instruction to CLFLUSH/PREFETCH scheduler class

Simon Pilgrim via llvm-commits llvm-commits at lists.llvm.org
Fri Dec 8 07:19:10 PST 2017


Author: rksimon
Date: Fri Dec  8 07:19:10 2017
New Revision: 320156

URL: http://llvm.org/viewvc/llvm-project?rev=320156&view=rev
Log:
[X86][AVX512] Tag CLWB instruction to CLFLUSH/PREFETCH scheduler class

Modified:
    llvm/trunk/lib/Target/X86/X86InstrInfo.td

Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.td?rev=320156&r1=320155&r2=320156&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrInfo.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrInfo.td Fri Dec  8 07:19:10 2017
@@ -2723,10 +2723,9 @@ def CLFLUSHOPT : I<0xAE, MRM7m, (outs),
                    "clflushopt\t$src", [(int_x86_clflushopt addr:$src)],
                    IIC_SSE_PREFETCH>, PD;
 
-let Predicates = [HasCLWB] in
+let Predicates = [HasCLWB], SchedRW = [WriteLoad] in
 def CLWB       : I<0xAE, MRM6m, (outs), (ins i8mem:$src), "clwb\t$src",
-                   [(int_x86_clwb addr:$src)]>, PD;
-
+                   [(int_x86_clwb addr:$src)], IIC_SSE_PREFETCH>, PD;
 
 //===----------------------------------------------------------------------===//
 // Subsystems.




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