[llvm] r320045 - [X86] Tag RDRAND/RDSEED instruction scheduler classes
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Thu Dec 7 06:18:48 PST 2017
Author: rksimon
Date: Thu Dec 7 06:18:48 2017
New Revision: 320045
URL: http://llvm.org/viewvc/llvm-project?rev=320045&view=rev
Log:
[X86] Tag RDRAND/RDSEED instruction scheduler classes
Modified:
llvm/trunk/lib/Target/X86/X86InstrInfo.td
llvm/trunk/lib/Target/X86/X86Schedule.td
llvm/trunk/test/CodeGen/X86/rdrand-schedule.ll
llvm/trunk/test/CodeGen/X86/rdseed-schedule.ll
Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.td?rev=320045&r1=320044&r2=320045&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrInfo.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrInfo.td Thu Dec 7 06:18:48 2017
@@ -2198,31 +2198,35 @@ let Predicates = [HasMOVBE] in {
//===----------------------------------------------------------------------===//
// RDRAND Instruction
//
-let Predicates = [HasRDRAND], Defs = [EFLAGS] in {
+let Predicates = [HasRDRAND], Defs = [EFLAGS], SchedRW = [WriteSystem] in {
def RDRAND16r : I<0xC7, MRM6r, (outs GR16:$dst), (ins),
"rdrand{w}\t$dst",
- [(set GR16:$dst, EFLAGS, (X86rdrand))]>, OpSize16, PS;
+ [(set GR16:$dst, EFLAGS, (X86rdrand))], IIC_RDRAND>,
+ OpSize16, PS;
def RDRAND32r : I<0xC7, MRM6r, (outs GR32:$dst), (ins),
"rdrand{l}\t$dst",
- [(set GR32:$dst, EFLAGS, (X86rdrand))]>, OpSize32, PS;
+ [(set GR32:$dst, EFLAGS, (X86rdrand))], IIC_RDRAND>,
+ OpSize32, PS;
def RDRAND64r : RI<0xC7, MRM6r, (outs GR64:$dst), (ins),
"rdrand{q}\t$dst",
- [(set GR64:$dst, EFLAGS, (X86rdrand))]>, PS;
+ [(set GR64:$dst, EFLAGS, (X86rdrand))], IIC_RDRAND>, PS;
}
//===----------------------------------------------------------------------===//
// RDSEED Instruction
//
-let Predicates = [HasRDSEED], Defs = [EFLAGS] in {
+let Predicates = [HasRDSEED], Defs = [EFLAGS], SchedRW = [WriteSystem] in {
def RDSEED16r : I<0xC7, MRM7r, (outs GR16:$dst), (ins),
"rdseed{w}\t$dst",
- [(set GR16:$dst, EFLAGS, (X86rdseed))]>, OpSize16, PS;
+ [(set GR16:$dst, EFLAGS, (X86rdseed))], IIC_RDSEED>,
+ OpSize16, PS;
def RDSEED32r : I<0xC7, MRM7r, (outs GR32:$dst), (ins),
"rdseed{l}\t$dst",
- [(set GR32:$dst, EFLAGS, (X86rdseed))]>, OpSize32, PS;
+ [(set GR32:$dst, EFLAGS, (X86rdseed))], IIC_RDSEED>,
+ OpSize32, PS;
def RDSEED64r : RI<0xC7, MRM7r, (outs GR64:$dst), (ins),
"rdseed{q}\t$dst",
- [(set GR64:$dst, EFLAGS, (X86rdseed))]>, PS;
+ [(set GR64:$dst, EFLAGS, (X86rdseed))], IIC_RDSEED>, PS;
}
//===----------------------------------------------------------------------===//
Modified: llvm/trunk/lib/Target/X86/X86Schedule.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86Schedule.td?rev=320045&r1=320044&r2=320045&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86Schedule.td (original)
+++ llvm/trunk/lib/Target/X86/X86Schedule.td Thu Dec 7 06:18:48 2017
@@ -498,6 +498,8 @@ def IIC_IRET : InstrItinClass;
def IIC_HLT : InstrItinClass;
def IIC_LXS : InstrItinClass;
def IIC_LTR : InstrItinClass;
+def IIC_RDRAND : InstrItinClass;
+def IIC_RDSEED : InstrItinClass;
def IIC_RDTSC : InstrItinClass;
def IIC_RSM : InstrItinClass;
def IIC_SIDT : InstrItinClass;
Modified: llvm/trunk/test/CodeGen/X86/rdrand-schedule.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/rdrand-schedule.ll?rev=320045&r1=320044&r2=320045&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/rdrand-schedule.ll (original)
+++ llvm/trunk/test/CodeGen/X86/rdrand-schedule.ll Thu Dec 7 06:18:48 2017
@@ -15,17 +15,17 @@ declare {i64, i32} @llvm.x86.rdrand.64()
define i16 @test_rdrand_16(i16* %random_val) {
; GENERIC-LABEL: test_rdrand_16:
; GENERIC: # %bb.0:
-; GENERIC-NEXT: rdrandw %ax
+; GENERIC-NEXT: rdrandw %ax # sched: [100:0.33]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; GOLDMONT-LABEL: test_rdrand_16:
; GOLDMONT: # %bb.0:
-; GOLDMONT-NEXT: rdrandw %ax
+; GOLDMONT-NEXT: rdrandw %ax # sched: [100:1.00]
; GOLDMONT-NEXT: retq # sched: [4:1.00]
;
; IVY-LABEL: test_rdrand_16:
; IVY: # %bb.0:
-; IVY-NEXT: rdrandw %ax
+; IVY-NEXT: rdrandw %ax # sched: [100:0.33]
; IVY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_rdrand_16:
@@ -40,12 +40,12 @@ define i16 @test_rdrand_16(i16* %random_
;
; SKYLAKE-LABEL: test_rdrand_16:
; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: rdrandw %ax
+; SKYLAKE-NEXT: rdrandw %ax # sched: [100:0.25]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_rdrand_16:
; SKX: # %bb.0:
-; SKX-NEXT: rdrandw %ax
+; SKX-NEXT: rdrandw %ax # sched: [100:0.25]
; SKX-NEXT: retq # sched: [7:1.00]
;
; ZNVER1-LABEL: test_rdrand_16:
@@ -60,17 +60,17 @@ define i16 @test_rdrand_16(i16* %random_
define i32 @test_rdrand_32(i32* %random_val) {
; GENERIC-LABEL: test_rdrand_32:
; GENERIC: # %bb.0:
-; GENERIC-NEXT: rdrandl %eax
+; GENERIC-NEXT: rdrandl %eax # sched: [100:0.33]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; GOLDMONT-LABEL: test_rdrand_32:
; GOLDMONT: # %bb.0:
-; GOLDMONT-NEXT: rdrandl %eax
+; GOLDMONT-NEXT: rdrandl %eax # sched: [100:1.00]
; GOLDMONT-NEXT: retq # sched: [4:1.00]
;
; IVY-LABEL: test_rdrand_32:
; IVY: # %bb.0:
-; IVY-NEXT: rdrandl %eax
+; IVY-NEXT: rdrandl %eax # sched: [100:0.33]
; IVY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_rdrand_32:
@@ -85,12 +85,12 @@ define i32 @test_rdrand_32(i32* %random_
;
; SKYLAKE-LABEL: test_rdrand_32:
; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: rdrandl %eax
+; SKYLAKE-NEXT: rdrandl %eax # sched: [100:0.25]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_rdrand_32:
; SKX: # %bb.0:
-; SKX-NEXT: rdrandl %eax
+; SKX-NEXT: rdrandl %eax # sched: [100:0.25]
; SKX-NEXT: retq # sched: [7:1.00]
;
; ZNVER1-LABEL: test_rdrand_32:
@@ -105,17 +105,17 @@ define i32 @test_rdrand_32(i32* %random_
define i64 @test_rdrand_64(i64* %random_val) {
; GENERIC-LABEL: test_rdrand_64:
; GENERIC: # %bb.0:
-; GENERIC-NEXT: rdrandq %rax
+; GENERIC-NEXT: rdrandq %rax # sched: [100:0.33]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; GOLDMONT-LABEL: test_rdrand_64:
; GOLDMONT: # %bb.0:
-; GOLDMONT-NEXT: rdrandq %rax
+; GOLDMONT-NEXT: rdrandq %rax # sched: [100:1.00]
; GOLDMONT-NEXT: retq # sched: [4:1.00]
;
; IVY-LABEL: test_rdrand_64:
; IVY: # %bb.0:
-; IVY-NEXT: rdrandq %rax
+; IVY-NEXT: rdrandq %rax # sched: [100:0.33]
; IVY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_rdrand_64:
@@ -130,12 +130,12 @@ define i64 @test_rdrand_64(i64* %random_
;
; SKYLAKE-LABEL: test_rdrand_64:
; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: rdrandq %rax
+; SKYLAKE-NEXT: rdrandq %rax # sched: [100:0.25]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_rdrand_64:
; SKX: # %bb.0:
-; SKX-NEXT: rdrandq %rax
+; SKX-NEXT: rdrandq %rax # sched: [100:0.25]
; SKX-NEXT: retq # sched: [7:1.00]
;
; ZNVER1-LABEL: test_rdrand_64:
Modified: llvm/trunk/test/CodeGen/X86/rdseed-schedule.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/rdseed-schedule.ll?rev=320045&r1=320044&r2=320045&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/rdseed-schedule.ll (original)
+++ llvm/trunk/test/CodeGen/X86/rdseed-schedule.ll Thu Dec 7 06:18:48 2017
@@ -13,32 +13,32 @@ declare {i64, i32} @llvm.x86.rdseed.64()
define i16 @test_rdseed_16(i16* %random_val) {
; GENERIC-LABEL: test_rdseed_16:
; GENERIC: # %bb.0:
-; GENERIC-NEXT: rdseedw %ax
+; GENERIC-NEXT: rdseedw %ax # sched: [100:0.33]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; GOLDMONT-LABEL: test_rdseed_16:
; GOLDMONT: # %bb.0:
-; GOLDMONT-NEXT: rdseedw %ax
+; GOLDMONT-NEXT: rdseedw %ax # sched: [100:1.00]
; GOLDMONT-NEXT: retq # sched: [4:1.00]
;
; BROADWELL-LABEL: test_rdseed_16:
; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: rdseedw %ax
+; BROADWELL-NEXT: rdseedw %ax # sched: [100:0.25]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_rdseed_16:
; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: rdseedw %ax
+; SKYLAKE-NEXT: rdseedw %ax # sched: [100:0.25]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_rdseed_16:
; SKX: # %bb.0:
-; SKX-NEXT: rdseedw %ax
+; SKX-NEXT: rdseedw %ax # sched: [100:0.25]
; SKX-NEXT: retq # sched: [7:1.00]
;
; ZNVER1-LABEL: test_rdseed_16:
; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: rdseedw %ax
+; ZNVER1-NEXT: rdseedw %ax # sched: [100:?]
; ZNVER1-NEXT: retq # sched: [1:0.50]
%call = call {i16, i32} @llvm.x86.rdseed.16()
%randval = extractvalue {i16, i32} %call, 0
@@ -48,32 +48,32 @@ define i16 @test_rdseed_16(i16* %random_
define i32 @test_rdseed_32(i16* %random_val) {
; GENERIC-LABEL: test_rdseed_32:
; GENERIC: # %bb.0:
-; GENERIC-NEXT: rdseedl %eax
+; GENERIC-NEXT: rdseedl %eax # sched: [100:0.33]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; GOLDMONT-LABEL: test_rdseed_32:
; GOLDMONT: # %bb.0:
-; GOLDMONT-NEXT: rdseedl %eax
+; GOLDMONT-NEXT: rdseedl %eax # sched: [100:1.00]
; GOLDMONT-NEXT: retq # sched: [4:1.00]
;
; BROADWELL-LABEL: test_rdseed_32:
; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: rdseedl %eax
+; BROADWELL-NEXT: rdseedl %eax # sched: [100:0.25]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_rdseed_32:
; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: rdseedl %eax
+; SKYLAKE-NEXT: rdseedl %eax # sched: [100:0.25]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_rdseed_32:
; SKX: # %bb.0:
-; SKX-NEXT: rdseedl %eax
+; SKX-NEXT: rdseedl %eax # sched: [100:0.25]
; SKX-NEXT: retq # sched: [7:1.00]
;
; ZNVER1-LABEL: test_rdseed_32:
; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: rdseedl %eax
+; ZNVER1-NEXT: rdseedl %eax # sched: [100:?]
; ZNVER1-NEXT: retq # sched: [1:0.50]
%call = call {i32, i32} @llvm.x86.rdseed.32()
%randval = extractvalue {i32, i32} %call, 0
@@ -83,32 +83,32 @@ define i32 @test_rdseed_32(i16* %random_
define i64 @test_rdseed_64(i64* %random_val) {
; GENERIC-LABEL: test_rdseed_64:
; GENERIC: # %bb.0:
-; GENERIC-NEXT: rdseedq %rax
+; GENERIC-NEXT: rdseedq %rax # sched: [100:0.33]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; GOLDMONT-LABEL: test_rdseed_64:
; GOLDMONT: # %bb.0:
-; GOLDMONT-NEXT: rdseedq %rax
+; GOLDMONT-NEXT: rdseedq %rax # sched: [100:1.00]
; GOLDMONT-NEXT: retq # sched: [4:1.00]
;
; BROADWELL-LABEL: test_rdseed_64:
; BROADWELL: # %bb.0:
-; BROADWELL-NEXT: rdseedq %rax
+; BROADWELL-NEXT: rdseedq %rax # sched: [100:0.25]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_rdseed_64:
; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: rdseedq %rax
+; SKYLAKE-NEXT: rdseedq %rax # sched: [100:0.25]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_rdseed_64:
; SKX: # %bb.0:
-; SKX-NEXT: rdseedq %rax
+; SKX-NEXT: rdseedq %rax # sched: [100:0.25]
; SKX-NEXT: retq # sched: [7:1.00]
;
; ZNVER1-LABEL: test_rdseed_64:
; ZNVER1: # %bb.0:
-; ZNVER1-NEXT: rdseedq %rax
+; ZNVER1-NEXT: rdseedq %rax # sched: [100:?]
; ZNVER1-NEXT: retq # sched: [1:0.50]
%call = call {i64, i32} @llvm.x86.rdseed.64()
%randval = extractvalue {i64, i32} %call, 0
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