[PATCH] D40942: [X86] Fix insert_vector_elt lowering for v32i1/v64i1 with non-constant index

[Craig Topper via Phabricator via llvm-commits]

craig.topper created this revision.

Currently we don't handle v32i1/v64i1 insert_vector_elt correctly as we fail to look at the number of elements closely and assume it can only be v16i1 or v8i1.

We also can't type legalize v64i1 insert_vector_elt correctly on KNL due to the type not being byte addressable as required by the legalizing through memory accesses path requires.

For the first issue, the patch now tries to pick a 512-bit register with the correct number of elements and promotes to that.

For the second issue, we now extend the vector to a byte addressable type, do the stores to memory, load the two halves, and then truncate the halves back to the original type. Technically since we changed the type, we may not need two loads, but actually checking that is more work and for the v64i1 case we do need them.

I plan to commit the two pieces as separate patches, but posting them together since I need both parts to pass the new tests.


https://reviews.llvm.org/D40942

Files:
  lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
  lib/Target/X86/X86ISelLowering.cpp
  test/CodeGen/X86/avx512-insert-extract.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D40942.125895.patch
Type: text/x-patch
Size: 9671 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20171207/d7943c46/attachment.bin>