[PATCH] D40792: DAG: Match truncated rotation (PR35487)

Hans Wennborg via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Dec 4 12:40:32 PST 2017


This revision was automatically updated to reflect the committed changes.
Closed by commit rL319692: DAG: Match truncated rotation (PR35487) (authored by hans).

Changed prior to commit:
  https://reviews.llvm.org/D40792?vs=125365&id=125403#toc

Repository:
  rL LLVM

https://reviews.llvm.org/D40792

Files:
  llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
  llvm/trunk/test/CodeGen/X86/rotate.ll


Index: llvm/trunk/test/CodeGen/X86/rotate.ll
===================================================================
--- llvm/trunk/test/CodeGen/X86/rotate.ll
+++ llvm/trunk/test/CodeGen/X86/rotate.ll
@@ -626,3 +626,22 @@
   store i8 %D, i8* %Aptr
   ret void
 }
+
+define i64 @truncated_rot(i64 %x, i32 %amt) {
+entry:
+  %sh_prom = zext i32 %amt to i64
+  %shl = shl i64 %x, %sh_prom
+  %sub = sub nsw i32 64, %amt
+  %sh_prom1 = zext i32 %sub to i64
+  %shr = lshr i64 %x, %sh_prom1
+  %or = or i64 %shr, %shl
+  %and = and i64 %or, 4294967295
+  ret i64 %and
+
+; 64-LABEL: truncated_rot:
+; 64:       # %bb.0:
+; 64-NEXT:    movl %esi, %ecx
+; 64-NEXT:    rolq %cl, %rdi
+; 64-NEXT:    movl %edi, %eax
+; 64-NEXT:    retq
+}
Index: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
===================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -4652,6 +4652,15 @@
   bool HasROTR = TLI.isOperationLegalOrCustom(ISD::ROTR, VT);
   if (!HasROTL && !HasROTR) return nullptr;
 
+  // Check for truncated rotate.
+  if (LHS.getOpcode() == ISD::TRUNCATE && RHS.getOpcode() == ISD::TRUNCATE) {
+    assert(LHS.getValueType() == RHS.getValueType());
+    if (SDNode *Rot = MatchRotate(LHS.getOperand(0), RHS.getOperand(0), DL)) {
+      return DAG.getNode(ISD::TRUNCATE, SDLoc(LHS), LHS.getValueType(),
+                         SDValue(Rot, 0)).getNode();
+    }
+  }
+
   // Match "(X shl/srl V1) & V2" where V2 may not be present.
   SDValue LHSShift;   // The shift.
   SDValue LHSMask;    // AND value if any.


-------------- next part --------------
A non-text attachment was scrubbed...
Name: D40792.125403.patch
Type: text/x-patch
Size: 1631 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20171204/7c6bf890/attachment.bin>


More information about the llvm-commits mailing list