[llvm] r319611 - [X86] Support %dr8-%dr15 in the assembler.

[Craig Topper via llvm-commits]

Author: ctopper
Date: Sat Dec  2 00:27:45 2017
New Revision: 319611

URL: http://llvm.org/viewvc/llvm-project?rev=319611&view=rev
Log:
[X86] Support %dr8-%dr15 in the assembler.

Apparently I failed to make this work when I fixed it in the disassembler way back in r224862.

Modified:
    llvm/trunk/lib/Target/X86/X86RegisterInfo.td
    llvm/trunk/test/MC/X86/x86-64.s

Modified: llvm/trunk/lib/Target/X86/X86RegisterInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86RegisterInfo.td?rev=319611&r1=319610&r2=319611&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86RegisterInfo.td (original)
+++ llvm/trunk/lib/Target/X86/X86RegisterInfo.td Sat Dec  2 00:27:45 2017
@@ -360,7 +360,7 @@ def GR64 : RegisterClass<"X86", [i64], 6
 def SEGMENT_REG : RegisterClass<"X86", [i16], 16, (add CS, DS, SS, ES, FS, GS)>;
 
 // Debug registers.
-def DEBUG_REG : RegisterClass<"X86", [i32], 32, (sequence "DR%u", 0, 7)>;
+def DEBUG_REG : RegisterClass<"X86", [i32], 32, (sequence "DR%u", 0, 15)>;
 
 // Control registers.
 def CONTROL_REG : RegisterClass<"X86", [i64], 64, (sequence "CR%u", 0, 15)>;

Modified: llvm/trunk/test/MC/X86/x86-64.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/X86/x86-64.s?rev=319611&r1=319610&r2=319611&view=diff
==============================================================================
--- llvm/trunk/test/MC/X86/x86-64.s (original)
+++ llvm/trunk/test/MC/X86/x86-64.s Sat Dec  2 00:27:45 2017
@@ -452,6 +452,9 @@ mov %rdx, %cr8
 mov %rdx, %cr15
 // CHECK: movq	%rdx, %cr15
 // CHECK: encoding: [0x44,0x0f,0x22,0xfa]
+mov %rdx, %dr15
+// CHECK: movq	%rdx, %dr15
+// CHECK: encoding: [0x44,0x0f,0x23,0xfa]
 
 // rdar://8456371 - Handle commutable instructions written backward.
 // CHECK: 	faddp	%st(1)