[PATCH] D40334: [X86] Break false dependencies for POPCNT, LZCNT, TZCNT

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Nov 30 11:57:32 PST 2017


craig.topper added a comment.

I don't know if you'd be allowed to widen the register class to 32-bit without doing some live register analysis to know the upper bits aren't used later.

But the dependency on 16-bit isn't completely "false", its needed to preserve the upper bits due to how partial registers are implemented for all processors after Sandybridge. Zeroing the register would break the dependency, but you would still need to do that on for 16-bit instructions even on Skylake and Cannonlake. The fixes made to the 32/64 instructions on those CPUs didn't change anything about the 16-bit instruction.

So I think we should just remove the 16-bit instructions from this patch.


https://reviews.llvm.org/D40334





More information about the llvm-commits mailing list