[PATCH] D40646: [mips] Enable the mnemonic spell corrector

[Simon Dardis via Phabricator via llvm-commits]

sdardis added a subscriber: SjoerdMeijer.
sdardis added a comment.

I looked at enabling this when @SjoerdMeijer developed the spell checker in the first place but hit upon a nasty error case:

  llvmgitsvnbuild $cat test-spellcheck.s
    swk $3, $4
  llvmgitsvnbuild $./bin/llvm-mc -arch=mips -mcpu=mips32r6 test-spellcheck.s -o - -mattr=+micromips
    .text
  test-spellcheck.s:1:3: error: unknown instruction, did you mean: sw, swe, swl, swm, swp, swr, usw?
    swk $3, $4
    ^

The swe there is potentially refering to the micromips or the micromipsr6 version. swl and swr should not be on the list.

There's a number of instructions which don't have the correct predicates, so the spelling checker will deliver the wrong results, as the set of possible corrections is dependant on the feature bits that are enabled.

I have been working on a patch set to correct / rework the instruction predicates which I should start posting next week.

I think we should hold off on enabling this until the instruction predicates have been fixed.



================
Comment at: test/MC/Mips/invalid-instructions-spellcheck.s:2
+# RUN: not llvm-mc -triple mips-unknown-unknown \
+# RUN:             -mattr=micromips -show-encoding < %s 2>&1 | FileCheck %s
+
----------------
This does not require -show-encoding as the test does not actually check any instruction encodings.


Repository:
  rL LLVM

https://reviews.llvm.org/D40646