[llvm] r319006 - [X86] Fix an assert that was incorrectly checking for BMI instead of AVX512VBMI.

[Craig Topper via llvm-commits]

Author: ctopper
Date: Sun Nov 26 13:14:48 2017
New Revision: 319006

URL: http://llvm.org/viewvc/llvm-project?rev=319006&view=rev
Log:
[X86] Fix an assert that was incorrectly checking for BMI instead of AVX512VBMI.

The check is actually unnecessary since AVX512VBMI implies AVX512BW which is the other part of the assert.

Modified:
    llvm/trunk/lib/Target/X86/X86ISelLowering.cpp

Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=319006&r1=319005&r2=319006&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Sun Nov 26 13:14:48 2017
@@ -2149,8 +2149,7 @@ static void Passv64i1ArgInRegs(
     const SDLoc &Dl, SelectionDAG &DAG, SDValue Chain, SDValue &Arg,
     SmallVector<std::pair<unsigned, SDValue>, 8> &RegsToPass, CCValAssign &VA,
     CCValAssign &NextVA, const X86Subtarget &Subtarget) {
-  assert((Subtarget.hasBWI() || Subtarget.hasBMI()) &&
-         "Expected AVX512BW or AVX512BMI target!");
+  assert(Subtarget.hasBWI() && "Expected AVX512BW target!");
   assert(Subtarget.is32Bit() && "Expecting 32 bit target");
   assert(Arg.getValueType() == MVT::i64 && "Expecting 64 bit value");
   assert(VA.isRegLoc() && NextVA.isRegLoc() &&