[PATCH] D40343: AMDGPU: Do not combine loads/store across physreg defs

[Nicolai Hähnle via Phabricator via llvm-commits]

nhaehnle created this revision.
Herald added subscribers: t-tye, tpr, dstuttard, yaxunl, wdng, kzhuravl.

Since this pass operates on machine SSA form, this should only really
affect M0 in practice.

Fixes various piglit variable-indexing/vs-varying-array-mat4-index-*

Change-Id: Ib2a1dc3a8d7b08225a8da49a86f533faa0986aa8
Fixes: r317751 ("AMDGPU: Merge S_BUFFER_LOAD_DWORD_IMM into x2, x4")


https://reviews.llvm.org/D40343

Files:
  lib/Target/AMDGPU/SILoadStoreOptimizer.cpp
  test/CodeGen/AMDGPU/llvm.amdgcn.interp.ll
  test/CodeGen/AMDGPU/smrd.ll

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