[PATCH] D39849: [RISCV] Implement prolog and epilog insertion

[Sameer AbuAsal via Phabricator via llvm-commits]

sabuasal added inline comments.


================
Comment at: lib/Target/RISCV/RISCVFrameLowering.cpp:90
+
+  if (!isInt<12>(StackSize)) {
+    report_fatal_error("Stack adjustment won't fit in signed 12-bit immediate");
----------------
How should we handle cases where we need a bigger stack?


https://reviews.llvm.org/D39849