[PATCH] D40305: [ARM] Fix an off-by-one error when restoring LR for 16-bit Thumb

[Momchil Velikov via Phabricator via llvm-commits]

chill created this revision.
Herald added subscribers: kristof.beyls, javed.absar, aemerson.

This commit https://reviews.llvm.org/rL318143 computes incorrectly to offset to restore `LR` from.

The number of `tPOP` operands is 2 (condition) + 2 (implicit def and use of SP) + count of the popped registers. We need to load `LR` from just past the last register, hence the correct offset should be either `getNumOperands() - 4` and `getNumExplicitOperands() - 2` (multiplied by 4).


Repository:
  rL LLVM

https://reviews.llvm.org/D40305

Files:
  lib/Target/ARM/Thumb1FrameLowering.cpp
  test/CodeGen/ARM/thumb1_return_sequence.ll
  test/CodeGen/ARM/v8m-tail-call.ll
  test/CodeGen/Thumb/thumb-shrink-wrapping.ll


Index: test/CodeGen/Thumb/thumb-shrink-wrapping.ll
===================================================================
--- test/CodeGen/Thumb/thumb-shrink-wrapping.ll
+++ test/CodeGen/Thumb/thumb-shrink-wrapping.ll
@@ -647,7 +647,7 @@
 ; ENABLE: push {r4, lr}
 
 ; CHECK: tst r3, r4
-; ENABLE-NEXT: ldr [[POP:r[4567]]], [sp, #8]
+; ENABLE-NEXT: ldr [[POP:r[4567]]], [sp, #4]
 ; ENABLE-NEXT: mov lr, [[POP]]
 ; ENABLE-NEXT: pop {[[POP]]}
 ; ENABLE-NEXT: add sp, #4
Index: test/CodeGen/ARM/v8m-tail-call.ll
===================================================================
--- test/CodeGen/ARM/v8m-tail-call.ll
+++ test/CodeGen/ARM/v8m-tail-call.ll
@@ -8,7 +8,7 @@
   %2 = tail call i32 @h0(i32 %1, i32 1, i32 2, i32 3)
   ret i32 %2
 ; CHECK-LABEL: f0
-; CHECK:      ldr     [[POP:r[4567]]], [sp
+; CHECK:      ldr     [[POP:r[4567]]], [sp, #4]
 ; CHECK-NEXT: mov     lr, [[POP]]
 ; CHECK-NEXT: pop     {{.*}}[[POP]]
 ; CHECK-NEXT: add     sp, #4
@@ -39,7 +39,7 @@
   %11 = phi i32 [ %9, %8 ], [ -1, %5 ]
   ret i32 %11
 ; CHECK-LABEL: f2
-; CHECK:      ldr     [[POP:r[4567]]], [sp
+; CHECK:      ldr     [[POP:r[4567]]], [sp, #12]
 ; CHECK-NEXT: mov     lr, [[POP]]
 ; CHECK-NEXT: pop     {{.*}}[[POP]]
 ; CHECK-NEXT: add     sp, #4
Index: test/CodeGen/ARM/thumb1_return_sequence.ll
===================================================================
--- test/CodeGen/ARM/thumb1_return_sequence.ll
+++ test/CodeGen/ARM/thumb1_return_sequence.ll
@@ -25,7 +25,7 @@
 ; --------
 ; Stack realignment means sp is restored from frame pointer
 ; CHECK-V4T:         mov sp
-; CHECK-V4T-NEXT:    ldr [[POP:r[4567]]], [sp, #{{.*}}]
+; CHECK-V4T-NEXT:    ldr [[POP:r[4567]]], [sp, #16]
 ; CHECK-V4T-NEXT:    mov lr, [[POP]]
 ; CHECK-V4T-NEXT:    pop {[[SAVED]]}
 ; CHECK-V4T-NEXT     add sp, sp, #4
@@ -57,14 +57,14 @@
 
 ; Epilogue
 ; --------
-; CHECK-V4T:         ldr [[POP:r[4567]]], [sp, #{{.*}}]
+; CHECK-V4T:         ldr [[POP:r[4567]]], [sp, #12]
 ; CHECK-V4T-NEXT:    mov lr, [[POP]]
 ; CHECK-V4T-NEXT:    pop {[[SAVED]]}
 ; CHECK-V4T-NEXT:    add sp, #16
 ; CHECK-V4T-NEXT:    bx  lr
 ; CHECK-V5T:         lsls r4
 ; CHECK-V5T-NEXT:    mov sp, r4
-; CHECK-V5T:         ldr [[POP:r[4567]]], [sp, #{{.*}}]
+; CHECK-V5T:         ldr [[POP:r[4567]]], [sp, #12]
 ; CHECK-V5T-NEXT:    mov lr, [[POP]]
 ; CHECK-V5T-NEXT:    pop {[[SAVED]]}
 ; CHECK-V5T-NEXT:    add sp, #16
Index: lib/Target/ARM/Thumb1FrameLowering.cpp
===================================================================
--- lib/Target/ARM/Thumb1FrameLowering.cpp
+++ lib/Target/ARM/Thumb1FrameLowering.cpp
@@ -647,7 +647,7 @@
     BuildMI(MBB, MBBI, dl, TII.get(ARM::tLDRspi))
       .addReg(PopReg, RegState::Define)
       .addReg(ARM::SP)
-      .addImm(MBBI->getNumOperands() - 3)
+      .addImm(MBBI->getNumExplicitOperands() - 2)
       .add(predOps(ARMCC::AL));
     // Move from the temporary register to the LR.
     BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVr))


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