[compiler-rt] r318610 - [X86] Add cpu detection for cannonlake.

Craig Topper via llvm-commits llvm-commits at lists.llvm.org
Sat Nov 18 16:46:21 PST 2017


Author: ctopper
Date: Sat Nov 18 16:46:21 2017
New Revision: 318610

URL: http://llvm.org/viewvc/llvm-project?rev=318610&view=rev
Log:
[X86] Add cpu detection for cannonlake.

This uses the same encoding for cannonlake in the proposed gcc patches here. https://gcc.gnu.org/ml/gcc-patches/2017-11/msg00551.html

Modified:
    compiler-rt/trunk/lib/builtins/cpu_model.c

Modified: compiler-rt/trunk/lib/builtins/cpu_model.c
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/builtins/cpu_model.c?rev=318610&r1=318609&r2=318610&view=diff
==============================================================================
--- compiler-rt/trunk/lib/builtins/cpu_model.c (original)
+++ compiler-rt/trunk/lib/builtins/cpu_model.c Sat Nov 18 16:46:21 2017
@@ -75,6 +75,7 @@ enum ProcessorSubtypes {
   INTEL_COREI7_BROADWELL,
   INTEL_COREI7_SKYLAKE,
   INTEL_COREI7_SKYLAKE_AVX512,
+  INTEL_COREI7_CANNONLAKE,
   CPU_SUBTYPE_MAX
 };
 
@@ -340,6 +341,12 @@ getIntelProcessorTypeAndSubtype(unsigned
       *Subtype = INTEL_COREI7_SKYLAKE_AVX512; // "skylake-avx512"
       break;
 
+    // Cannonlake:
+    case 0x66:
+      *Type = INTEL_COREI7;
+      *Subtype = INTEL_COREI7_CANNONLAKE; // "cannonlake"
+      break;
+
     case 0x1c: // Most 45 nm Intel Atom processors
     case 0x26: // 45 nm Atom Lincroft
     case 0x27: // 32 nm Atom Medfield




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