[PATCH] D40137: [ARM] 't' asm constraint should accept i32

[Yi Kong via Phabricator via llvm-commits]

kongyi created this revision.
Herald added subscribers: eraman, javed.absar, aemerson.

't' constraint normally only accepts f32 operands, but for VCVT the operands can be i32. LLVM is overly restrictive and rejects asm like:

  float foo() {
    float result;
    __asm__ __volatile__(
      "vcvt.f32.s32 %[result], %[arg1]\n"
      : [result]"=t"(result)
      : [arg1]"t"(0x01020304) );
    return result;
  }

Relax the value type for 't' constraint to either f32 or i32.


Repository:
  rL LLVM

https://reviews.llvm.org/D40137

Files:
  lib/Target/ARM/ARMISelLowering.cpp
  test/CodeGen/ARM/inlineasm.ll


Index: test/CodeGen/ARM/inlineasm.ll
===================================================================
--- test/CodeGen/ARM/inlineasm.ll
+++ test/CodeGen/ARM/inlineasm.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=arm-eabi -mattr=+v6 %s -o /dev/null
+; RUN: llc -mtriple=armv8-eabi -mattr=+neon %s -o /dev/null
 
 define i32 @test1(i32 %tmp54) {
 	%tmp56 = tail call i32 asm "uxtb16 $0,$1", "=r,r"( i32 %tmp54 )		; <i32> [#uses=1]
@@ -9,3 +9,8 @@
 	tail call void asm sideeffect "/* number: ${0:c} */", "i"( i32 1 )
 	ret void
 }
+
+define float @t-constriant-int(i32 %i) {
+	%ret = call float asm "vcvt.f32.s32 $0, $1\0A", "=t,t"(i32 %i)
+	ret float %ret
+}
Index: lib/Target/ARM/ARMISelLowering.cpp
===================================================================
--- lib/Target/ARM/ARMISelLowering.cpp
+++ lib/Target/ARM/ARMISelLowering.cpp
@@ -13024,7 +13024,7 @@
         return RCPair(0U, &ARM::QPR_8RegClass);
       break;
     case 't':
-      if (VT == MVT::f32)
+      if (VT == MVT::f32 || VT == MVT::i32)
         return RCPair(0U, &ARM::SPRRegClass);
       break;
     }


-------------- next part --------------
A non-text attachment was scrubbed...
Name: D40137.123202.patch
Type: text/x-patch
Size: 1085 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20171116/74449f6c/attachment.bin>